Meets or Exceeds the Requirements of ITU
Recommendations V.10, V.11, X.26, and
X.27
D
Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
D
Designed to Operate Up to 20 Mbaud
D
3-State Outputs
D
Common-Mode Input Voltage Range
– 7 V to 7 V
D
Input Sensitivity...±300 mV
D
Input Hysteresis...120 mV Typ
D
High-Input Impedance...12 kΩ Min
D
Operates from Single 5-V Supply
D
Low Supply-Current Requirement
D OR N PACKAGE
(TOP VIEW)
1B
1
1A
2
3
1Y
4
G
5
2Y
6
2A
7
2B
GND
8
16
15
14
13
12
11
10
V
CC
4B
4A
4Y
G
3Y
3A
9
3B
35 mA Max
D
Improved Speed and Power Consumption
Compared to AM26LS32A
description
The SN75ALSI97 is a monolithic, quadruple line receiver with 3-state outputs designed using advanced,
low-power, Schottky technology. This technology provides combined improvements in bar design, tooling
production, and wafer fabrication. This, in turn, provides significantly lower power requirements and permits
much higher data throughput than other designs. The device meets the specifications of ITU Recommendations
V .10, V.11, X.26, and X.27. It features 3-state outputs that permit direct connection to a bus-organized system
with a fail-safe design that ensures the outputs will always be high if the inputs are open.
The device is optimized for balanced, multipoint bus transmission at rates up to 20 megabits per second. The
input features high-input impedance, input hysteresis for increased noise immunity , and an input sensitivity of
±300 mV over a common-mode input voltage range of –7 V to 7 V . It also features active-high and active-low
enable functions that are common to the four channels. The SN75ALS197 is designed for optimum performance
when used with the SN75ALS192 quadruple differential line driver.
The SN75ALS197 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each receiver)
DIFFERENTIAL INPUTS
A–B
VID ≥ 0.3 V
– 0.3 V < VID < 0.3 V
VID ≤ – 0.3 V
XLHZ
Open
H = high level, L = low level, X = irrelevant, ? = indeterminate,
Z = high impedance (off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ENABLES
GG
H
X
H
X
H
X
H
X
X
L
X
L
X
L
X
L
OUTPUT
Y
H
H
?
?
L
L
H
H
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
Page 2
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
4
12
2
1
6
7
10
9
14
15
†
≥ 1
EN
3
1Y
5
2Y
11
3Y
13
4Y
logic symbol
G
G
1A
1B
2A
2B
3A
3B
4A
4B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
4
G
12
G
2
1A
1
1B
6
2A
7
2B
10
3A
9
3B
14
4A
15
4B
11
13
3
1Y
5
2Y
3Y
4Y
schematics of inputs and outputs
EQUIVALENT OF EACH A OR B INPUTEQUIVALENT OF G OR G INPUTSEQUIVALENT OF ALL OUTPUTS
V
CC
Input
GND
18 kΩ
NOM
300 kΩ
NOM
VCC (A)
or
GND (B)
3 kΩ
NOM
2 kΩ
NOM
V
CC
Input
GND
22 kΩ
NOM
50 kΩ
NOM
V
CC
Output
GND
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 3
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Differential input voltage, V
Enable input voltage, V
Low-level output current, I
Operating free-air temperature range, T
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to network ground terminal.
2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
Supply voltage, V
Common-mode input voltage, V
Differential input voltage, V
High-level input voltage, V
Low-level input voltage, V
High-level output current, I
Low-level output current, I
Operating free-air temperature, T
CC
ID
IH
IL
OH
OL
IC
A
4.7555.25V
±7V
±12V
2V
0.8V
–400µA
16mA
070°C
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
Page 4
SN75ALS197
VOLLow-level output voltage
V
300 mV
V
IOZHigh-impedance-state output current
V
V
A
IILine input current
,
mA
IHHigh-level enable-input current
A
ID
,
L
,
C
See Figure 3
ns
C
15 pF
See Figure 3
ns
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
electrical characteristics over recommended range of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
The algebraic convention, in which the less positive limit is designated minimum, is used in this data sheet for threshold voltage levels only.
§
Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 3: Refer to ANSI Standard EIA/TIA-422-B and EIA/TIA-423-B for exact conditions.
– V
IT+
p
)See Figure 4120mV
IT–
= –
ID
p
§
= 5.25
CC
Other input at 0 V ,
See Note 3
VID = 3 V,VO = 0–15–78–130mA
IOL = 8 mA
IOL = 16 mA
VO = 2.4 V
VOH = 0.4 V
VI = 15 V
VI = –15 V
VIH = 2.7 V
VIH = 5.25 V
‡
–1.0–1.7
0.45
0.5
20
–20
0.71.2
20
100
mV
µ
µ
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
t
Propagation delay time, low- to high-level output
PLH
t
Propagation delay time, high- to low-level output
PHL
t
Output enable time to high level
PZH
t
Output enable time to low level
PZL
t
Output disable time from high level
PHZ
t
Output disable time from low level
PLZ
V
= – 2.5 V to 2.5 V,C
See Figure 2
= 15 pF,
L
=
L
= 15 pF,
p
p
,
1522ns
1522ns
1325
1125
1325
1522
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
PARAMETER MEASUREMENT INFORMATION
V
2 V
ID
V
OL
I
OL
V
OH
I
OH
Figure 1. V
Generator
(see Note A)
50 Ω
CL = 15 pF
(see Note B)
2 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle ≤ 50%, ZO = 50 Ω,
tr ≤ 6 ns, tf ≤ 6 ns.
B. CL includes probe and jig capacitance.
Figure 2. t
PLH
and t
PHL
and VOL Test Circuit
OH
Output
Input
Output
t
PLH
0 V
VOLTAGE WAVEFORMSTEST CIRCUIT
Test Circuit and Voltage Waveforms
0 V
2.5 V
–2.5 V
t
PHL
V
OH
1.3 V1.3 V
V
OL
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
Page 6
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
PARAMETER MEASUREMENT INFORMATION
≤ 5 ns
From Output
Under Test
(see Note A)
≤ 5 ns≤ 5 ns≤ 5 ns
Test
Point
C
L
LOAD CIRCUIT
5 kΩ
V
CC
RL = 2 kΩ
S1
See Note B
S2
Enable
G
10%
Enable
Output
NOTES: A. CL includes probe and jig capacitance.
90%
1.3 V
G
S2 Closed
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G
90%90%
1.3 V1.3 V
See Note C
10%10%
t
PZH
S1 Open
VOLTAGE WAVEFORMS FOR t
1.3 V1.3 V
t
PHZ
high; G is tested with G low.
Figure 3. t
PHZ
, t
PZH
10%
90%
1.3 V
S1 Closed
S2 Closed
PHZ
, t
and t
PLZ
3 V
0 V
3 V
0 V
0.5 V
V
≈ 1.4 V
PZH
, and t
Enable
G
10%
Enable
OH
Output
Load Circuit and Voltage Waveforms
PZL
90%
1.3 V
G
90%90%
See Note C
t
S1 Closed
S2 Open
VOLTAGE WAVEFORMS FOR t
PZL
t
PLZ
3 V
1.3 V1.3 V
10%10%
10%
90%
1.3 V
S1 Closed
S2 Closed
and t
PLZ
PZL
0 V
3 V
0 V
≈ 1.4 V
V
OL
0.5 V
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 7
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
TYPICAL CHARACTERISTICS
5
VID = 300 mV
4.5
VIC = 0
RL = 8 kΩ to GND
4
TA = 25°C
3.5
3
2.5
2
– Output Voltage – VV
O
1.5
1
0.5
0
00.511.5
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
22.53
Enable Voltage – V
Figure 4
OUTPUT VOLTAGE
ENABLE VOLTAGE
4
TA = 70°C
3.5
TA = 25°C
TA = 0°C
3
2.5
2
– Output Voltage – VV
1.5
O
1
0.5
0
00.511.52
vs
VCC = 5 V
VID = 300 mV
VIC = 0
RL = 8 kΩ to GND
2.53
Enable Voltage – V
Figure 5
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
6
5
4
3
– Output Voltage – VV
2
O
1
0
00.51
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
Enable Voltage – V
VID = – 300 mV
VIC = 0
RL = 1 kΩ to V
TA = 25°C
1.522.5
CC
3
6
5
4
3
– Output Voltage – VV
2
O
1
0
00.51
Figure 6
OUTPUT VOLTAGE
vs
ENABLE VOLTAGE
TA = 0°C
TA = 25°C
TA = 70°C
VCC = 5 V
VID = – 300 mV
VIC = 0
RL = 1 kΩ to V
1.522.5
Enable Voltage – V
Figure 7
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
Page 8
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
TYPICAL CHARACTERISTICS
DIFFERENTIAL INPUT VOLTAGE
5
VCC = 5 V
4.5
VIC = –12 V to 12 V
IO = 0
4
TA = 25°C
3.5
3
2.5
2
– Output Voltage – VV
O
1.5
1
0.5
0
– 200– 1000
– 150– 5050150
VIT
VID – Differential Input Voltage – mV
OUTPUT VOLTAGE
vs
–
Figure 8
VIT
+
100200
HIGH-LEVEL OUTPUT VOLTAGE
FREE-AIR TEMPERATURE
4
IOH = 0
3.5
IOH = – 400 µA
3
2.5
2
1.5
– High-Level Output Voltage – VV
1
OH
VCC = 5 V
0.5
VID = 300 mV
VIC = 0
0
01020304050
TA – Free-Air Temperature – ° C
Figure 9
vs
607080
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
4.5
4
3.5
3
2.5
2
1.5
– High-Level Output Voltage – VV
OH
1
0.5
0
–10–30–50–70–90
0– 20– 40– 60– 80
IOH – High-Level Output Current – mA
Figure 10Figure 11
VID = 300 mV
VIC = 0
TA = 25°C
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
– 100
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
4.5
4
3.5
3
2.5
2
1.5
– High-Level Output Voltage – VV
OH
1
0.5
0
0– 20–40–60– 80– 100
–10–30–50–70–90
IOH – High-Level Output Current – mA
VCC = 5 V
VID = 300 mV
VIC = 0
TA = 0°C
TA = 25°C
TA = 70°C
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 9
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.4
VCC = 5 V
0.35
0.25
0.15
– Low-Level Output Volatge – VV
OL
0.05
VID = – 300 mV
VIC = 0
0.3
IO = 8 mA
0.2
IO = 0
0.1
– Low-Level Output Voltage – VV
LOW-LEVEL OUTPUT VOLTAGE
LOW-LEVEL OUTPUT CURRENT
0.8
0.7
0.6
0.5
0.4
0.3
0.2
OL
0.1
0
01020304050
VCC = 4.5 V
VCC = 5 V
VCC = 5.5 V
IOL – Low-Level Output Current – mA
vs
0
01020304050
TA – Free-Air Temperature – ° C
Figure 12
0.8
0.7
0.6
0.5
0.4
0.3
– Low-Level Output Voltage – VV
0.2
VID = – 300 mV
VIC = 0
TA = 25°C
607080
OL
0.1
607080
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
TA = 70°C
TA = 25°C
TA = 0°C
VCC = 5 V
VID = – 300 mV
VIC = 0
0
01020304050
IOL – Low-Level Output Current – mA
607080
Figure 13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Figure 14
9
Page 10
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
SUPPLY VOLTAGE
50
VID = – 300 mV
VIC = 0
45
IO= 0
TA = 25°C
40
35
30
25
20
– Supply Current – mAI
CC
15
10
5
0
1357
024
VCC – Supply Voltage – V
Figure 15
vs
Disabled
Enabled
68
SUPPLY CURRENT
FREE-AIR TEMPERATURE
30
25
20
15
– Supply Current – mAI
10
CC
5
0
01020304050
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
VID = – 300 mV
Outputs Enabled
IO = 0
TA – Free-Air Temperature – ° C
Figure 16
vs
607080
DIFFERENTIAL INPUT VOLTAGE
30
25
20
15
– Supply Current – mAI
10
CC
IO = 0
5
Outputs Enabled
VIC = 0
TA = 25°C
0
– 200– 1000
VID – Differential Input Voltage – mV
SUPPLY CURRENT
vs
Figure 17
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
100200
SUPPLY CURRENT
vs
FREQUENCY
40
VCC = 5 V
VI = ± 1.5-V Square Wave
35
CL = 15 pF
Four Channels Driven
30
TA = 25°C
25
20
– Supply Current – mAI
15
CC
10
5
0
10 k100 k1 M10 M100 M
f – Frequency – Hz
Figure 18
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 11
SN75ALS197
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS045B – JANUARY 1989 – REVISED MA Y 1995
TYPICAL CHARACTERISTICS
INPUT RESISTANCE
vs
FREE-AIR TEMPERATURE
30
25
Ω
20
15
10
– Input Resistance – kr
I
5
0
10807060504030200
TA – Free-Air Temperature – ° C
3
TA = 25°C
2
1
0
–1
– Input Current – mAI
I
–2
–3
–1515201050–5–10–20
Figure 19
INPUT CURRENT
vs
INPUT VOLTAGE TO GND
VI – Input Voltage to GND – V
Figure 20
30
25
20
15
10
Switching Time – ns
5
0
0
SWITCHING TIME
vs
FREE-AIR TEMPERATURE
VCC = 5 V
CL = 15 pF
t
PZH
t
PHZ
10
TA – Free-Air Temperature – ° C
Figure 21
t
PZL
t
PHZ
t
t
PHL
t
PLH
PLZ
t
PZH
PROPAGATION DELAY TIME
vs
SUPPLY VOLTAGE
20
CL = 15 pF
18
TA = 25°C
16
14
12
10
8
6
4
tpd – Propagation Delay Time – ns
2
0
4.6
80706050403020
4.5
VCC – Supply Voltage – V
t
PHL
t
PLH
5.55.45.35.25.154.94.84.7
Figure 22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
11
Page 12
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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