Page 1
74VHCT74A
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
■ HIGHSPEED:
f
=160MHz(TYP.)atVCC=5V
MAX
■ LOW POWERDISSIPATION:
=2 µA (MAX.) at TA=25oC
I
CC
■ COMPATIBLEWITHTTL OUTPUTS:
V
=2V(MIN),VIL=0.8V(MAX)
IH
■ POWERDOWN PROTECTIONON INPUTS&
OUTPUTS
■ SYMMETRICALOUTPUTIMPEDANCE:
|I
|=IOL=8 mA (MIN)
OH
■ BALANCEDPROPAGATIONDELAYS:
t
≅ t
PLH
PHL
■ OPERATINGVOLTAGERANGE:
V
(OPR)= 4.5Vto 5.5V
CC
■ PINANDFUNCTIONCOMPATIBLEWITH
74SERIES74
■ IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT74A is an advanced high-speed
CMOS DUAL D-TYPE FLIP FLOP WITH
PRESETAND CLEAR fabricatedwith sub-micron
silicon gate and double-layermetal wiring C
2
MOS
technology.
A signal on the D INPUT is transfered to the Q
OUTPUT during the positive going transition of
PACKAGE TUBE T & R
SOP 74VHCT74AM 74VHCT74AMTR
TSSOP 74VHCT74ATTR
the clock pulse.
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriateinput.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
devicecan be used to interface5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
SOP TSSOP
ORDER CODES
PIN CONNECTIONAND IEC LOGIC SYMBOLS
March 2000
1/10
Page 2
74VHCT74A
INPUT EQUIVALENTCIRCUIT
PIN DESCRIPTION
PI N No SYM BO L NAM E AND FUNCTI O N
1, 13 1CLR,
2CLR
Asyncronous Reset -
Direct Input
2, 12 1D, 2D Data Input
3, 11 1CK, 2CK Clock Input
(LOW-to-HIGH, Edge-
Triggered)
4, 10 1PR, 2PR Asyncronous Set - Direct
Input
5, 9 1Q, 2Q True Flip-Flop Outputs
6, 8 1Q, 2Q Complement Flip-Flop
Outputs
7 GND Ground (0V)
14 V
CC
Positive Supply Voltage
TRUTH TABLE
INP U T S OUT P UTS FUNCTI ON
CLRPRDCKQ Q
L H X X L H CLEAR
H L X X H L PRESET
LLXXHH
HHL LH
HHH HL
HHX Q
X:Don’tCare
n
Q
n
NO CHANGE
LOGICDIAGRAM
Thislogic diagram has notbeused to estimate propagation delays
2/10
Page 3
74VHCT74A
ABSOLUTE MAXIMUM RATINGS
Symb o l Para met er Value Unit
V
V
V
V
I
I
OK
I
or I
I
CC
T
T
AbsoluteMaximum Ratingsarethosevaluesbeyond whichdamagetothedevicemayoccur. Functionaloperationunder these condition isnotimplied.
1)V
=0
CC
2)HighorLowState
RECOMMENDEDOPERATINGCONDITIONS
Symb o l Para met er Value Unit
V
V
V
V
T
dt/dv
1)VCC=0
2)HighorLowState
from0.8Vto 2 V
3)V
IN
Supply Voltage -0.5 to +7.0 V
CC
DC Input Voltage -0.5 to +7.0 V
I
DC Output Voltage (see note 1) -0.5 to +7.0 V
O
DC Output Voltage (see note 2) -0.5 to VCC+ 0.5 V
O
DC Input Diode Current - 20 mA
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current ± 50 mA
GND
Storage Temperature -65 to +150
stg
Lead Temperature (10 sec) 300
L
Supply Voltage 4.5 to 5.5 V
CC
Input Voltage 0 to 5.5 V
I
Output Voltage (see note 1) 0 to 5.5 V
O
Output Voltage (see note 2) 0 to V
O
Operating Temperature -40 to +85
op
Input Rise and Fall Time (see note 3) (V
=5.0±0.5V)
CC
20 mA
±
25 mA
±
CC
0 to 20 ns/V
o
C
o
C
V
o
C
DC SPECIFICATIONS
Symb o l Parameter Test C o n diti o ns Val u e Uni t
T
=25oC -40 t o 85oC
A
1.35 1.5 mA
µ
V
V
V
V
I
∆I
I
OPD
V
CC
High Level Input
IH
(V)
4.5 to 5.5 2 2 V
Min. Typ. Max. Min. Max.
Voltage
Low Level Input
IL
4.5 to 5.5 0.8 0.8 V
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
Input Leakage Current 0 to5.5 VI= 5.5V or GND ±0.1 ±1.0 µA
I
I
Quiescent Supply
CC
4.5 IO=-50 µA 4.4 4.5 4.4
4.5 I
=-8 mA 3.94 3.8
O
4.5 IO=50 µ A 0.0 0.1 0.1
4.5 I
=8 mA 0.36 0.44
O
5.5 VI=VCCorGND 2 20
Current
Additional Worst Case
CC
Supply Current
5.5 One Input at 3.4V,
other input at V
CC
or
GND
Output Leakage
0V
= 5.5V 0.5 5.0 µA
OUT
Current
V
V
A
3/10
Page 4
74VHCT74A
AC ELECTRICAL CHARACTERISTICS
(Inputt
r=tf
=3 ns)
Symbol Parameter Test Condition Value Unit
t
Propagation Delay
PLH
t
Time CK to Q or Q
PHL
Propagation Delay
t
PLH
t
Time
PHL
V
(V)
5.0
5.0
5.0
5.0
CC
C
L
(pF)
(*)
15 5.8 7.8 1.0 9.0
(*)
50
(*)
15 7.6 10.4 1.0 12.0
(*)
50 8.1 11.4 1.0 13.0
T
=25oC -40 t o 85oC
A
Min. Typ. Max. Min. Max.
6.3 8.8 1.0 10.0
ns
ns
PR or CLR to Q or Q
CK Pulse Width
t
w
HIGH or LOW
PR or CLR Pulse
t
w
Width LOW
Setup Time D to CK
t
s
HIGH or LOW
Hold Time D to CK
t
h
HIGH or LOW
t
Removal Time CLR or
REM
PR to CK
MAX
Maximum Clock
f
Frequency
(*)Voltagerangeis5V± 0.5V
5.0
5.0
5.0
5.0
5.0
5.0
5.0
(*)
(*)
(*)
(*)
(*)
(*)
15 100 160 80
(*)
50
80 140 65
5.0 5.0
5.0 5.0
5.0 5.0
0.0 0.0
3.5 3.5
ns
ns
ns
ns
ns
MHz
CAPACITIVE CHARACTERISTICS
Symb o l Parameter Test C o n diti o ns Val u e Uni t
=25oC -40 t o 85oC
T
A
Min. Typ. Max. Min. Max.
Input Capacitance 4 10 10
C
IN
Power Dissipation
C
PD
10.5 pF
Capacitance (note 1)
1)CPDisdefinedasthevalueoftheIC’sinternal equivalentcapacitance whichiscalculatedfromtheoperatingcurrent consumptionwithout load.(Referto
TestCircuit).Averageoperatingcurrent canbeobtained bythefollowingequation.I
(opr)=CPD• VCC• fIN+ICC/2(perGate)
CC
pF
4/10
Page 5
TESTCIRCUIT
CL= 15/50 pF orequivalent (includes jig and probe capacitance)
R
ofpulsegenerator(typically50Ω)
T=ZOUT
74VHCT74A
WAVEFORM1: PROPAGATIONDELAYS, SETUP AND HOLD TIMES
(f=1MHz;50% duty cycle)
5/10
Page 6
74VHCT74A
WAVEFORM2: PROPAGATIONDELAYS
(f=1MHz;50% dutycycle)
6/10
Page 7
74VHCT74A
WAVEFORM3: REMOVALTIMES
(f=1MHz;50% duty cycle)
WAVEFORM4: PULSEWIDTH
7/10
Page 8
74VHCT74A
SO-14 MECHANICALDATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45 (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S 8 (max.)
mm inch
8/10
P013G
Page 9
TSSOP14 MECHANICAL DATA
74VHCT74A
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.1 0.433
A1 0.05 0.10 0.15 0.002 0.004 0.006
A2 0.85 0.9 0.95 0.335 0.354 0.374
b 0.19 0.30 0.0075 0.0118
c 0.09 0.20 0.0035 0.0079
D 4.9 5 5.1 0.193 0.197 0.201
E 6.25 6.4 6.5 0.246 0.252 0.256
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0
o
o
4
o
8
o
0
o
4
L 0.50 0.60 0.70 0.020 0.024 0.028
o
8
A2
A
A1
PIN 1 IDENTIFICATION
b
e
c
K
L
E
D
E1
1
9/10
Page 10
74VHCT74A
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