Datasheet 74VHCT374A Datasheet (SGS Thomson Microelectronics)

Page 1
WITH 3 STATE OUTPUT NON INVERTING
HIGHSPEED:
f
LOW POWERDISSIPAT ION:
COMPATIBLEWITHTTLOUTPUTS:
POWERDOWN PROTECTIONON INPUTS&
SYMMETRICALOUTPUTIMPEDANCE:
BALANCEDPROPAGATIONDELAYS:
OPERATINGVOLTAGERANGE:
PINANDFUNCTIONCOMPATIBLEWITH
IMPROVEDLATCH-UPIMMUNITY
LOWNOISEV
DESCRIPTION
The 74VHCT374A is an advanced high-speed CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metalwiring C
This 8 bit D-Type flip-flop is controlled by a clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q outputs will be set to the logic state that were
=180MHz(TYP.)atVCC=5V
MAX
=4 µA (MAX.) at TA=25oC
I
V
=2V(MIN),VIL=0.8V(MAX)
IH
OUTPUTS |I
|=IOL=8mA(MIN)
OH
t
t
PLH
PHL
V
(OPR)= 4.5Vto5.5V
74SERIES374
=0.9V(Max.)
OLP
2
MOStechnology.
74VHCT374A
OCTAL D-TYPE FLIP FLOP
SOP TSSOP
ORDER CODES
PACKAGE TUBE T & R
SOP 74VHCT374AM 74VHCT374AMTR
TSSOP 74VHCT374ATTR
setupat the D inputs. While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedancestate.
The output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even whilethe outputsare off.
Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This devicecan be usedto interface5V to 3V.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGICSYMBOLS
February 2000
1/10
Page 2
74VHCT374A
INPUT EQUIVALENTCIRCUIT PIN DESCRIPTION
PI N No SYMB OL NAME AND F U NCTIO N
1 OE 3 State Output Enable
2, 5, 6, 9,
12, 15, 16,
19
3, 4, 7, 8,
13, 14, 17,
18 11 CLOCK Clock Input (LOW to
10 GND Ground (0V) 20 V
TRUTH TABLE
INPUTS OUTPUTS
OE CK D Q
HXXZ
L X NO CHANGE LLL LHH
X:Don’tcare Z:Highimpedance
Q0 to Q7 3 State Outputs
D0 to D7 Data Inputs
CC
Input (Active LOW)
HIGH, edge triggered)
Positive Supply Voltage
LOGICDIAGRAM
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Page 3
74VHCT374A
ABSOLUTE MAXIMUM RATINGS
Symb o l Parameter Value U n i t
V
V V V
I
I
OK
I
or I
I
CC
T
T
AbsoluteMaximumRatingsarethosevaluesbeyondwhichdamagetothedevicemayoccur.Functionaloperationunderthesecondition isnotimplied.
1)Outputin OFFState
2)HighorLowState
RECOMMENDEDOPERATINGCONDITIONS
Symb o l Parameter Value Unit
V
V V V
T
dt/dv
1)Outputin OFFState
2)HighorLowState from0.8Vto 2V
3)V
IN
Supply Voltage -0.5 to +7.0 V
CC
DC Input Voltage -0.5 to +7.0 V
I
DC Output Voltage (see note 1) -0.5 to +7.0 V
O
DC Output Voltage (see note 2) -0.5 to VCC+ 0.5 V
O
DC Input Diode Current - 20 mA
IK
DC Output Diode Current DC Output Current
O
DC VCCor Ground Current ± 50 mA
GND
Storage Temperature -65 to +150
stg
Lead Temperature (10 sec) 300
L
Supply Voltage 4.5 to 5.5 V
CC
Input Voltage 0 to 5.5 V
I
Output Voltage (see note 1) 0 to 5.5 V
O
Output Voltage (see note 2) 0 to V
O
Operating Temperature -40 to +85
op
Input Rise and Fall Time (see note 3) (V
=5.0±0.5V)
CC
20 mA
±
25 mA
±
CC
0 to 20 ns/V
o
C
o
C
V
o
C
3/10
Page 4
74VHCT374A
DC SPECIFICATIONS
Symb o l Para met er Test Conditi o ns Val u e Uni t
T
=25oC -40 to 85oC
A
±0.25 ±2.5 µA
1.35 1.5 mA
V
V
V
V
I
I
I
I
OPD
V
CC
High Level Input
IH
(V)
4.5 to 5.5 2 2 V
Min. Typ. Max. Min. Max.
Voltage Low Level Input
IL
4.5 to 5.5 0.8 0.8 V
Voltage High Level Output
OH
Voltage Low Level Output
OL
Voltage High Impedance
OZ
Output Leakage
4.5 IO=-50 µA 4.4 4.5 4.4
4.5 I
=-8 mA 3.94 3.8
O
4.5 IO=50µA 0.0 0.1 0.1
4.5 I
4.5 to 5.5 VI=VIHor V
=8 mA 0.36 0.44
O
IL
VO= 0V to 5.5V
Current Input Leakage Current 0 to 5.5 VI= 5.5V or GND ±0.1 ±1.0 µA
I
I
Quiescent Supply
CC
5.5 VI=VCCorGND 4 40 µA
Current Additional Worst Case
CC
Supply Current
5.5 One Input at 3.4V, other input at V
CC
or
GND
Output Leakage
0V
= 5.5V 0.5 5.0 µA
OUT
Current
V
V
AC ELECTRICAL CHARACTERISTICS
(Inputt
r=tf
=3 ns)
Symbol Parameter Test Conditi on Value Unit
t
Propagation Delay
PLH
Time CK to Q
t
PHL
Output EnableTime 5.0
t
PZL
t
PZH
t
Output Disable Time 5.0
PLZ
t
PHZ
t
Clock Pulse Width
w
V
(V)
5.0
5.0
5.0
5.0
CC
C
L
(pF)
(*)
15 5.6 9.4 1.0 10.5
(*)
50
(*)
15 RL=1K
(*)
50 7.1 11.2 1.0 12.5
(*)
(*)
50 RL=1K
Min. Typ. Max. Min. Max.
=25oC -40 to 85oC
T
A
6.4 10.4 1.0 11.5
6.2 10.2 1.0 11.5
7.0 11.2 1.0 12.0 ns
6.5 6.5 ns
ns
ns
HIGH or LOW Setup Time D to CK
t
s
5.0
(*)
2.0 2.0 ns
HIGH or LOW Hold Time D to CK
t
h
5.0
(*)
1.5 1.5 ns
HIGH or LOW
MAX
Maximum Clock
f
Frequency
t t
(*) Voltagerangeis5V ±0.5V Note1:Parameterguaranteedbydesign. t
Output to Output Skew
OSLH
Time (note 1)
OSHL
soLH
5.0
5.0
5.0
=|t
pLHm-tpLHn
(*)
15 90 180 80
(*)
50 85 170 75
(*)
50 1.0 1.0 ns
|,t
soHL
=|t
pHLm-tpHLn
|
MHz
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Page 5
74VHCT374A
CAPACITIVE CHARACTERISTICS
Symb o l Para met er Test Conditi o ns Val u e Uni t
=25oC -40 to 85oC
T
A
Min. Typ. Max. Min. Max.
Input Capacitance 4 10 10
C
IN
C
Output Capacitance 9
OUT
Power Dissipation
C
PD
15 pF
Capacitance (note 1)
1)CPDisdefinedasthevalueoftheIC’sinternalequivalentcapacitance whichis calculatedfromtheoperatingcurrentconsumptionwithoutload.(Referto TestCircuit).Average operatingcurrent canbeobtainedbythefollowingequation.I
(opr)= CPD• VCC• fIN+ICC/8(perFlip-Flop)
CC
DYNAMICSWITCHING CHARACTERISTICS
Symb o l Para met er Test Conditi o ns Val u e Uni t
T
V
CC
(V)
V V
V
Dynamic Low Voltage
OLP
Quiet Output (note 1, 2)
OLV
Dynamic High Voltage
IHD
5.0
5.0 2.0
C
L
=50pF
Min. Typ. Max. Min. Max.
Input (note 1, 3)
V
Dynamic Low Voltage
ILD
5.0 0.8
Input (note 1, 3)
1)Worstcasepackage.
2)Maxnumberofoutputsdefinedas(n).Datainputsaredriven0Vto3.0V,(n-1)outputsswitching andoneoutputatGND.
3)Maxnumberofdatainputs (n)switching.(n-1)switching0Vto3.0V.Inputsundertestswitching:3.0Vtothreshold(V
=25oC -40 to 85oC
A
0.6 0.9
-0.9 -0.6
),0Vtothreshold(V
ILD
),f=1MHz.
IHD
pF pF
V
TESTCIRCUIT
TEST SWITCH
t
PLH,tPHL
t
PZL,tPLZ
t
PZH,tPHZ
CL= 15/50 pF or equivalent (includes jig and probe capacitance)
=1KΩorequivalent
R
L=R1
R
ofpulsegenerator(typically50)
T=ZOUT
Open
V
CC
GND
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Page 6
74VHCT374A
WAVEFORM1: PROPAGATIONDELAYS, SETUP AND HOLD TIMES
(f=1MHz;50% duty cycle)
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Page 7
74VHCT374A
WAVEFORM2: OUTPUTENABLE AND DISABLE TIMES
(f=1MHz;50% duty cycle)
WAVEFORM3: PULSEWIDTH
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Page 8
74VHCT374A
SO-20 MECHANICAL DATA
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.65 0.104 a1 0.10 0.20 0.004 0.007 a2 2.45 0.096
b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012
C 0.50 0.020
c1 45 (typ.)
D 12.60 13.00 0.496 0.512
E 10.00 10.65 0.393 0.419
e 1.27 0.050 e3 11.43 0.450
F 7.40 7.60 0.291 0.299
L 0.50 1.27 0.19 0.050
M 0.75 0.029
S 8 (max.)
mm inch
8/10
P013L
Page 9
TSSOP20 MECHANICAL DATA
74VHCT374A
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.1 0.433
A1 0.05 0.10 0.15 0.002 0.004 0.006
A2 0.85 0.9 0.95 0.335 0.354 0.374
b 0.19 0.30 0.0075 0.0118
c 0.09 0.2 0.0035 0.0079
D 6.4 6.5 6.6 0.252 0.256 0.260
E 6.25 6.4 6.5 0.246 0.252 0.256
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0
o
o
4
o
8
o
0
o
4
L 0.50 0.60 0.70 0.020 0.024 0.028
o
8
A2
A
A1
PIN 1 IDENTIFICATION
b
e
K
c
L
E
D
E1
1
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Page 10
74VHCT374A
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