The 74VHCT14A is an advanced high-speed
CMOS HEX SCHMITT INVERTER fabricated wi th
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer ou tput, which provides high no ise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
TSSOPSOP
ORDER CODES
PACKAGETUBET & R
SOP74VHCT14AM74VHCT14AMTR
TSSOP74VHCT14ATTR
inputs with no regard to the supply voltage. This
device can be us ed to interf ac e 5V to 3V since al l
inputs are equipped with TTL threshold.
Pin configuration and function are the same as
those of the 74VHC04 but the 74VHC14 has
hysteresis.
This together with its schmitt trigger function
allows it to be used on line receivers with slow
rise/fall input signals.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8June 2001
Page 2
74VHCT14A
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1, 3, 5, 9, 1 1,
13
2, 4, 6, 8, 10,
12
7GNDGround (0V)
14
TRUTH TABLE
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
V
I
I
OK
I
I
or I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) V
CC
2) High or Low State
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage (see note 1)
O
DC Output Voltage (see note 2)-0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
= 0V
1A to 6AData Inputs
1Y to 6YData Outputs
V
CC
Positive Supply Voltage
AY
LH
HL
-0.5 to +7.0V
-0.5 to +7.0V
-0.5 to +7.0V
V
- 20mA
± 20mA
± 25mA
± 50mA
-65 to +150°C
300°C
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
V
T
1) V
CC
2) High or Low State
2/8
Supply Voltage
CC
Input Voltage
I
Output Voltage (see note 1)
O
Output Voltage (see note 2)0 to V
O
Operating Temperature
op
= 0V
4.5 to 5.5V
0 to 5.5V
0 to 5.5V
CC
-55 to 125°C
V
Page 3
DC SPECIFICATIONS
SymbolParameter
V
High Level
t+
Threshold Voltage
V
Low Level
t-
Threshold Voltage
V
Hysteresis Voltage4.5 0.41.40.41.40.41.4
h
V
V
I
I
OPD
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
Quiescent Supply
CC
Current
I
Additional Worst
CC
Case Supply
Current
Output Leakage
Current
74VHCT14A
Test ConditionValue
T
= 25°C
V
CC
(V)
A
Min.Typ.Max.Min.Max. Min. Max.
4.5 2.02.02.0
5.5
2.02.02.0
4.5 0.60.60.6
5.50.60.60.6
5.50.41.50.41.50.41.5
4.5
4.5
4.5
4.5
0 to
5.5
5.5
IO=-50 µA
I
=-8 mA
O
IO=50 µA
=8 mA
I
O
V
= 5.5V or GND
I
= VCC or GND
V
I
4.44.54.44.4
3.943.83.7
0.00.10.10.1
One Input at 3.4V,
other input at V
5.5
CC
or GND
= 5.5V
0
V
OUT
-40 to 85°C -55 to 125°C
0.360.440.55
± 0.1± 1.0± 1.0µA
22020µA
1.351.51.5mA
0.5 5.0 5.0µA
Unit
V
V
V
V
V
AC ELECTRICAL CHARACTERISTICS (Input t
= tf = 3ns)
r
Test ConditionValue
= 25°C
SymbolParameter
t
PLH
t
PHL
(*) Vol tage range is 5. 0V ± 0.5V
Propagation Delay
Time
(*)
(V)
C
(pF)
L
V
CC
5.0155.58.61.010.01.010.0
5.0506.79.01.011.01.011.0
T
A
-40 to 85°C -55 to 125°C
Min.Typ.Max.Min.Max. Min. Max.
Unit
ns
CAPACITIVE CHARACTERISTICS
Test ConditionValue
= 25°C
SymbolParameter
T
A
Min.Typ.Max.Min.Max. Min. Max.
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance
6101010pF
16pF
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + ICC/6 (per gate)
CC(opr)
Unit
3/8
Page 4
74VHCT14A
DYNAMIC SWITCHING CHARACTERISTICS
Test ConditionValue
T
SymbolParameter
V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2)
V
CC
(V)
5.0
= 25°C
A
Min.Typ.Max.Min.Max. Min. Max.
0.30.8
-0.8-0.3
Dynamic High
V
IHD
Voltage Input
5.02.0
= 50 pF
C
L
(note 1, 3)
Dynamic Low
V
ILD
Voltage Input
5.00.6
(note 1, 3)
1) Worst c ase package.
2) Max number of output s defined as (n). Data inputs ar e driven 0V to 3.0 V, (n-1) outputs switching and one output at GND .
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V
(V
), f=1MHz.
IHD
TEST CIRCUIT
-40 to 85°C -55 to 125°C
ILD
Unit
V
), 0V to threshold
CL =15/50pF or equivalent (includes jig and probe capaci tance)
R
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