The 74VHCT02A is an advanced high-speed
CMOS QUAD 2-INPUT NOR GATE fabricated
with sub-micron silicon gate and double-layer
metalwiring C
2
MOStechnology.
M
(Micro Package)
(TSSOPPackage)
T
ORDERCODES :
74VHCT02AM74VHCT02AT
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunityand stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
devicecan be usedto interface5V to 3V.
All inputs andoutputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
1/7
Page 2
74VHCT02A
INPUT EQUIVALENTCIRCUIT
PIN DESCRIPTION
PI N NoSYMB OLNAME AND F U NCTION
2, 5, 8, 111A to 4AData Inputs
3, 6, 9, 121B to 4BData Inputs
CL= 15/50pF or equivalent (includes jigand probe capacitance)
R
ofpulsegenerator (typically50Ω)
T=ZOUT
WAVEFORM: PROPAGATION DELAYS
4/7
(f=1MHz;50% duty cycle)
Page 5
SO-14 MECHANICAL DATA
74VHCT02A
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A1.750.068
a10.10.20.0030.007
a21.650.064
b0.350.460.0130.018
b10.190.250.0070.010
C0.50.019
c145 (typ.)
D8.558.750.3360.344
E5.86.20.2280.244
e1.270.050
e37.620.300
F3.84.00.1490.157
G4.65.30.1810.208
L0.51.270.0190.050
M0.680.026
S8 (max.)
mminch
P013G
5/7
Page 6
74VHCT02A
TSSOP14 MECHANICAL DATA
DIM.
mminch
MIN.TYP.MAX.MIN.TYP.MAX.
A1.10.433
A10.050.100.150.0020.0040.006
A20.850.90.950.3350.3540.374
b0.190.300.00750.0118
c0.090.200.00350.0079
D4.955.10.1930.1970.201
E6.256.46.50.2460.2520.256
E14.34.44.480.1690.1730.176
e0.65 BSC0.0256 BSC
K0
o
o
4
o
8
o
0
o
4
L0.500.600.700.0200.0240.028
o
8
A
PIN 1 IDENTIFICATION
6/7
A2
A1
b
e
c
K
L
E
D
E1
1
Page 7
74VHCT02A
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