74VCX1632245
8/15
AC ELECTRICAL CHARACTERISTICS
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device
switching in the same direction, either HIGH or LOW (t
OSLH
=|t
PLHm-tPLHn
|, t
OSHL
=|t
PHLm-tPHLn
|
2) Parameter guaranteed by design
CAPACITANCE CHARACT ERISTICS
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average current can be obtained by the following equation. I
CC(opr)=CPDxVCCxfIN+ICC
/16 (per circuit)
Symbol Parameter
Test Condition Value
Unit
V
CCB
(V)
V
CCA
(V)
-40 to 85 °C
Min. Max.
t
PLHtPHL
Propagation Delay Time
An to Bn
1.8± 0.15 2.5 ± 0.2
C
L
=30pF
R
L
=500Ω
1.0 5.8
ns1.8 ± 0.15 3.3 ± 0.3 1.0 6.2
2.5 ± 0.2 3.3 ± 0.3 1.0 4.4
t
PLHtPHL
Propagation Delay Time
Bn to An
1.8± 0.15 2.5 ± 0.2
C
L
=30pF
R
L
=500Ω
1.0 5.5
ns1.8 ± 0.15 3.3 ± 0.3 1.0 5.1
2.5 ± 0.2 3.3 ± 0.3 1.0 4.0
t
PZLtPZH
Output Enable Time
G
to An
1.8± 0.15 2.5 ± 0.2
C
L
=30pF
R
L
=500Ω
1.0 5.3
ns1.8 ± 0.15 3.3 ± 0.3 1.0 5.1
2.5 ± 0.2 3.3 ± 0.3 1.0 4.0
t
PZLtPZH
Output Enable Time
G
to Bn
1.8± 0.15 2.5 ± 0.2
C
L
=30pF
R
L
=500Ω
1.0 8.3
ns1.8 ± 0.15 3.3 ± 0.3 1.0 8.2
2.5 ± 0.2 3.3 ± 0.3 1.0 4.6
t
PLZtPHZ
Output Disable Time
G
to An
1.8± 0.15 2.5 ± 0.2
C
L
=30pF
R
L
=500Ω
1.0 5.2
ns1.8 ± 0.15 3.3 ± 0.3 1.0 5.6
2.5 ± 0.2 3.3 ± 0.3 1.0 4.8
t
PLZtPHZ
Output Disable Time
G
to Bn
1.8± 0.15 2.5 ± 0.2
C
L
=30pF
R
L
=500Ω
1.0 4.6
ns1.8 ± 0.15 3.3 ± 0.3 1.0 4.5
2.5 ± 0.2 3.3 ± 0.3 1.0 4.4
t
OSLH
t
OSHL
Output ToOutput Skew
Time (note1, 2)
1.8± 0.15 2.5 ± 0.2
C
L
=30pF
R
L
=500Ω
0.5
ns1.8 ± 0.15 3.3 ± 0.3 0.5
2.5 ± 0.2 3.3 ± 0.3 0.75
Symbol Parameter
Test Condition Value
Unit
V
CCB
(V)
V
CCA
(V)
T
A
=25°C
-40to85°C
Min. Typ. Max. Min. Max.
C
INB
Input Capacitance open open 5 pF
C
I/O
Input/Output
Capacitance
2.5 3.3 6 pF
C
PD
Power Dissipation
Capacitance
2.5 3.3 f=10MHz 28 pF
1.8 3.3 28 pF