The 74V1T79 is an advanced high-speed CMOS
SINGLE POSITIVE EDGE TRIGGERED D-TYPE
FLIP-FLOP fabricated with sub-micron silicon
gate and double-layer metal wiring C
technology. It is designed to operate from 4.5V to
5.5V, making this device ideal for portable
applications.
This D-Type flip-flop is controlled by a clock input
(CK). On the positive transition of the clock, the Q
output will be s et to the logic state that was setup
at the D input.
2
MOS
74V1T79
D-TYPE FLIP-FLOP
SOT323-5LSOT23-5L
ORDER CODES
PACKAGET & R
SOT23-5L74V1T79STR
SOT323-5L74V1T79CTR
Following the hold time interval, data at the D input
can be changed without affecting the level at the
output. Power down protection is provided on
inputs and 0 to 7V can be accepted on inputs with
no rega rd to t he supply voltage. This device can
be used to interface 5V to 3V systems.
It’s available in the commercial and extended
temperature range.
All inputs and output are equipped with protection
circuits against static discharge, giving them ESD
immunity and transient excess v oltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/9April 2004
Page 2
74V1T79
INPUT EQUIVALENT CIRCUITPIN DESCRIPTION
PIN N°SYMBOLNAME AND FUNCTION
1DData Input
2CK
4QFlip-Flop Output
3GNDGround (0V)
5
TRUTH TABLE
DCKQ
LL
HH
LQn
HQn
ABSOLUTE MAXIMUM RATINGS
V
CC
Clock Input (Positive
Edge)
Positive Supply Voltage
SymbolParameterValueUnit
V
V
V
I
I
OK
I
or I
I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage-0.5 to VCC+0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0V
-0.5 to +7.0V
V
-20mA
± 20mA
± 25mA
± 50mA
-65 to +150°C
300°C
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
T
dt/dv
1) VINfrom0.8V to 2V
Supply Voltage
CC
Input Voltage
I
Output Voltage0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 1) (V
=5.0± 0.5V)
CC
4.5 to 5.5V
0to5.5V
CC
-55 to 125°C
0 to 20ns/V
V
2/9
Page 3
DC SPECIFICATIONS
SymbolParameter
V
V
V
+I
High Level Input
IH
Voltage
V
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
I
Quiescent Supply
CC
Current
Additional Worst
CC
Case Supply
Current
Test ConditionValue
T
= 25°C
V
CC
(V)
4.5to
A
Min.Typ. Max.Min.Max. Min. Max.
222V
5.5
4.5to
5.5
4.5
4.5
4.5
4.5
0to
5.5
5.5
IO=-50 µA4.44.54.44.4V
=-8 mA3.943.83.7
I
O
IO=50 µA0.00.10.10.1V
I
=8 mA0.360.440.55
O
VI=5.5VorGND
V
I=VCC
or GND
One Input at 3.4V,
other input at V
5.5
CC
or GND
74V1T79
-40 to 85°C -55 to 125°C
0.80.80.8V
± 0.1± 1.0± 1.0µA
11020µA
1.351.51.5mA
Unit
AC ELECTRICAL CHARACTERISTICS (Input t
r=tf
=3ns)
Test ConditionValue
SymbolParameter
t
PLHtPHL
f
(*) Voltage range is 5.0V ± 0.5V
Propagation Delay
Time CK to Q
t
CK Pulse Width,
W
HIGH or LOW
t
SetupTimeDto
s
CK, HIGH or LOW
t
Hold Time D to CK,
h
HIGH or LOW
Maximum Clock
MAX
Frequency
T
V
(V)
CC
C
(pF)
L
A
Min.Typ. Max.Min.Max. Min. Max.
5.0 (*)153.95.51.06.51.07.5ns
5.0 (*)504.56.51.07.51.08.5
5.0 (*)3.03.03.0ns
5.0 (*)2.02.02.0ns
5.0 (*)1.01.01.0ns
5.0 (*)50120180120120MHz
-40 to 85°C -55 to 125°C
Unit
= 25°C
CAPACITIVE CHARACTERISTICS
Test ConditionValue
T
SymbolParameter
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance
(note 1)
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= 25°C
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
4101010pF
8pF
CC(opr)=CPDxVCCxfIN+ICC
Unit
3/9
Page 4
74V1T79
TEST CIRCUIT
CL= 15/50pF or equivalent (includes jig and probe capacitance)
R
T=ZOUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAY, S E TUP AND HOLD TIMES (f=1M H z; 50% duty cycle)
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