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74V1T77
SINGLE D-TYPE LATCH
■ HIGH SPEED: t
■ LOW POWER DISSIPATION:
I
= 1µA(MAX.) at TA=25°C
CC
■ COMPA TIBLE WITH TTL OUTPUTS:
V
= 2V (MIN), VIL = 0.8V (MAX)
IH
■ POWER DOWN PROTECTION ON INPUT S
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 8mA (MIN) at VCC = 4.5V
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
■ OPERATING VOLTAGE RANGE:
V
CC
■ IMPROVED LATCH-UP IMMUNITY
PHL
(OPR) = 4.5V to 5.5V
= 4.7ns (TYP.) at VCC = 5V
PD
DESCRIPTION
The 74V1T77 is an advanc ed high-speed CM OS
SINGLE D-TYPE LATCH fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is designed to
operate from 4.5V to 5.5V, making this device
ideal for portable applications.
The single D-Type latch is controlled by an Latch
Enable Input (LE). While the L E input is held at a
high level, the Q output will follow the data input
precisely. When the LE input is taken low the Q
SOT323-5LSOT23-5L
ORDER CODES
PACKAGE T & R
SOT23-5L 74V1T77STR
SOT323-5L 74V1T77CTR
output is latched p recisely at the logic level of D
data input.
Power down protection is provided on in puts and
0 to 7V c an be accepted on inputs with no regard
to the supply voltage. This device can be used to
interface 5V to 3V.
It’s available in the commercial and extended
temperature range.
All inputs and output are equippe d with prot ection
circuits against stati c disc harge , giving t hem ES D
immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/10July 2001
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74V1T77
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1 D Data Input
2 LE Latch Enable Input
4 Q Data Output
3 GND Ground (0V)
V
CC
ABSOLUTE MAXIMUM RATINGS
5
TRUTH TABLE
DLEQ
L L No Change *
H L No Change *
LHL
HHH
(*) Q outp ut is l at ched at the time when the LE inp ut is ta ken low
logic level.
Positive Supply Voltage
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
I
or I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0 V
-0.5 to +7.0 V
V
- 20 mA
± 20 mA
± 25 mA
± 50 mA
-65 to +150 °C
300 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
dt/dv
1) VIN from 0.8V to 2V
Supply Voltage
CC
Input Voltage
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 1) (V
= 5.0 ± 0.5V)
CC
4.5 to 5.5 V
0 to 5.5 V
CC
-55 to 125 °C
0 to 20 ns/V
V
2/10
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DC SPECIFICATIONS
Symbol Parameter
V
V
V
V
I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
Quiescent Supply
CC
Current
I
Additional Worst
CC
Case Supply
Current
Test Condition Value
T
= 25°C
V
CC
(V)
4.5 to
A
Min. Typ. Max. Min. Max. Min. Max.
222V
5.5
4.5 to
5.5
4.5
4.5
4.5
4.5
0 to
5.5
5.5
IO=-50 µA 4.4 4.5 4.4 4.4 V
I
=-8 mA 3.94 3.8 3.7
O
IO=50 µA 0.0 0.1 0.1 0.1 V
I
=8 mA 0.36 0.44 0.55
O
V
= 5.5V or GND
I
= VCC or GND
V
I
One Input at 3.4V,
other input at V
5.5
CC
or GND
74V1T77
-40 to 85°C -55 to 125°C
0.8 0.8 0.8 V
± 0.1 ± 1.0 ± 1.0 µA
11020µA
1.35 1.5 1.5 mA
Unit
AC ELECTRICAL CHARACTERISTICS (Input t
= tf = 3ns)
r
Test Condition Value
Symbol Parameter
t
PLH tPHL
t
PLH tPHL
(*) Vol tage range is 5.0V ± 0.5V
Propagation Delay
Time LE to Q
Propagation Delay
Time D to Q
t
LE Pulse Width,
W
HIGH
t
Setup Time D to
s
LE, HIGH or LOW
Hold Time D to LE,
t
h
HIGH or LOW
T
V
(V)
CC
C
(pF)
L
A
Min. Typ. Max. Min. Max. Min. Max.
5.0 (*) 15 4.4 6.5 1.0 7.5 1.0 8.5
5.0 (*) 50 4.8 7.0 1.0 8.0 1.0 9.0
5.0 (*) 15 4.7 6.5 1.0 7.5 1.0 8.5
5.0 (*) 50 5.3 7.0 1.0 8.0 1.0 9.0
5.0 (*) 3.0 3.0 3.0
5.0 (*)
5.0 (*)
2.0 2.0 2.0
1.0 1.0 1.0
-40 to 85°C -55 to 125°C
Unit
ns
ns
ns
ns
ns
= 25°C
CAPACITIVE CHARACTERISTICS
Test Condition Value
= 25°C
Symbol Parameter
T
A
Min. Typ. Max. Min. Max. Min. Max.
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance
4101010pF
8pF
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (R ef er to Test Circui t ). Average ope rating curre nt can be obtained by the follow i ng equation. I
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + I
CC(opr)
CC
Unit
3/10
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74V1T77
TEST CIRCUIT
CL = 15/50pF or e qui valent (inc lu des jig and probe capacitance)
= Z
R
WAVEFORM 1: LE TO Qn PROPAGATION DELAYS, LE MINIMUN PULSE WIDTH, Dn TO LE SETUP
AND HOLD TIMES (f=1MHz; 50% duty cycle)
of pulse generator (typically 50Ω)
T
OUT
4/10
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WAVEFORM 2: PROPAGATION DELAY TIME (f=1 MHz; 50% duty cycl e )
74V1T77
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74V1T77
SOT23-5L MECHANICAL DATA
mm. mils
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 0.90 1.45 35.4 57.1
A1 0.00 0.15 0.0 5.9
A2 0.90 1.30 35.4 51.2
b 0.35 0.50 13.7 19.7
C 0.09 0.20 3.5 7.8
D 2.80 3.00 110.2 118.1
E 2.60 3.00 102.3 118.1
E1 1.50 1.75 59.0 68.8
e0.95 37.4
e1 1.9 74.8
L 0.35 0.55 13.7 21.6
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74V1T77
SOT323-5L MECHANICAL DATA
mm. mils
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 0.80 1.10 31.5 43.3
A1 0.00 0.10 0.0 3.9
A2 0.80 1.00 31.5 39.4
b 0.15 0.30 5.9 11.8
C 0.10 0.18 3.9 7.1
D 1.80 2.20 70.9 86.6
E 1.80 2.40 70.9 94.5
E1 1.15 1.35 45.3 53.1
e0.65 25.6
e1 1.3 51.2
L 0.10 0.30 3.9 11.8
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74V1T77
Tape & Reel SOT23-xL MECHANICAL DATA
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 180 7.086
C 12.8 13.0 13.2 0.504 0.512 0.519
D 20.2 0.795
N 60 2.362
T 14.4 0.567
Ao 3.13 3.23 3.33 0.123 0.127 0.131
Bo 3.07 3.17 3.27 0.120 0.124 0.128
Ko 1.27 1.37 1.47 0.050 0.054 0.0.58
Po 3.9 4.0 4.1 0.153 0.157 0.161
P 3.9 4.0 4.1 0.153 0.157 0.161
mm. inch
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Tape & Reel SOT323-xL MECHANICAL DATA
74V1T77
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 175 180 185 6.889 7.086 7.283
C 12.8 13 13.2 0.504 0.512 0.519
D 20.2 0.795
N 59.5 60 60.5 2.362
T 14.4 0.567
Ao 2.25 0.088
Bo 2.7 0.106
Ko 1.2 0.047
Po 3.98 4 4.2 0.156 0.157 0.165
P 3.98 4 4.2 0.156 0.157 0.165
mm. inch
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74V1T77
Information furnished is bel ieved to be accurate and reliable. However, STMicroe lectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No li cense is granted by implica tion or otherwise under any patent or patent righ ts of S TMic roelec tronics. Specifications
mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information
previously supplied. S TMicroelectronics products are not authorized for use as critica l components in life suppo rt devices or
systems without express written approval of STMicroelectronics.
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