The 74V1T125 is an advanced high-speed CM OS
SINGLE BUS BUFFER fabricatedwith sub-micron
silicon gate and double-layer me tal wiring C
2
MOS
technology.
3-STATE control input G
has to be set HIGH t o
place the out put into the high impedance state.
SOT323-5LSOT23-5L
ORDER CODES
PACKAGET & R
SOT23-5L74V1T125STR
SOT323-5L74V1T125CTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
usedto interface 5V to 3V.
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage-0.5 to VCC+0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0V
-0.5 to +7.0V
V
-20mA
± 20mA
± 25mA
± 50mA
-65 to +150°C
300°C
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
T
dt/dv
1) VINfrom0.8V to 2V
Supply Voltage
CC
Input Voltage
I
Output Voltage0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 1) (V
=5.0± 0.5V)
CC
4.5 to 5.5V
0to5.5V
CC
-55 to 125°C
0 to 20ns/V
2/10
V
Page 3
DC SPECIFICATIONS
SymbolParameter
V
V
V
+I
High Level Input
IH
Voltage
V
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
High Impedance
OZ
Output Leakage
Current
Input Leakage
I
I
Current
I
Quiescent Supply
CC
Current
Additional Worst
CC
Case Supply
Current
Test ConditionValue
T
= 25°C
V
CC
(V)
4.5to
A
Min.Typ. Max.Min.Max. Min. Max.
222V
5.5
4.5to
5.5
4.5
4.5
4.5
4.5
5.5
0to
5.5
5.5
IO=-50 µA4.44.54.44.4V
=-8 mA3.943.83.7
I
O
IO=50 µA0.00.10.10.1V
I
=8 mA0.360.440.55
O
I=VIH
or V
IL
V
VO=VCCor GND
V
=5.5VorGND
I
V
I=VCC
or GND
One Input at 3.4V,
other input at V
5.5
CC
or GND
74V1T125
-40 to 85°C -55 to 125°C
0.80.80.8V
±0.25± 2.5± 5.0µA
± 0.1± 1.0± 1.0µA
11020µA
1.351.51.5mA
Unit
AC ELECTRICAL CHARACTERISTICS (Input t
Test ConditionValue
SymbolParameter
t
t
t
t
t
t
(*) Voltage range is 5.0V± 0.5V
Propagation Delay
PLH
Time
PHL
Output Disable
PLZ
Time
PHZ
Output Enable
PZL
Time
PZH
V
(V)
5.0
5.0
5.0
5.0
5.0
5.0
C
CC
L
(pF)
(*)
153.56.01.07.01.08.0
(*)
503.86.51.07.51.08.5
(*)
153.95.01.06.01.07.0
(*)
504.37.01.08.01.09.0
(*)
154.37.01.08.01.09.0
(*)
504.77.51.08.51.09.5
=3ns)
r=tf
= 25°C
T
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
Unit
ns
ns
ns
3/10
Page 4
74V1T125
CAPACITIVE CHARACTERISTICS
Test ConditionValue
= 25°C
SymbolParameter
T
A
Min.Typ. Max.Min.Max. Min. Max.
C
C
C
Input Capacitance
IN
Output
OUT
Capacitance
Power Dissipation
PD
Capacitance
4101010pF
5pF
14pF
(note 1)
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
TEST CIRCUIT
-40 to 85°C -55 to 125°C
CC(opr)=CPDxVCCxfIN+ICC
Unit
TESTSWITCH
t
PLH,tPHL
t
PZL,tPLZ
t
PZH,tPHZ
CL=15/50pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
R
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