The 74LVX27 is a low voltage CMOS TRIPLE
3-INPUT NOR GATE fabricat ed with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
TSSOPSOP
ORDER CODES
PACKAGETUBET & R
SOP74LVX27M74LVX27MTR
TSSOP74LVX27TTR
The internal circuit is composed of 3 stages
including buffer ou tput, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8July 2001
Page 2
74LVX27
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
1, 3, 91A to 3AData Inputs
2, 4, 101B to 3BData Inputs
13, 5, 111C to 3CData Inputs
12, 6, 81Y to 3YData Outputs
7GNDGround (0V)
14
V
CC
TRUTH TABLE
ABCY
LLLH
HXXL
XHXL
XXHL
X : Don‘t Care
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
I
or I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage-0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
Positive Supply Voltage
-0.5 to +7.0V
-0.5 to +7.0V
V
- 20mA
± 20mA
± 25mA
± 50mA
-65 to +150°C
300°C
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
T
dt/dv
1) Truth T abl e guarante ed: 1.2V to 3.6 V
2) V
from 0.8V to 2.0V
IN
2/8
Supply Voltage (note 1)
CC
Input Voltage
I
Output Voltage0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 2) (V
= 3.3V)
CC
2 to 3.6V
0 to 5.5V
CC
-55 to 125°C
0 to 100ns/V
V
Page 3
DC SPECIFICATIONS
SymbolParameter
V
V
V
V
I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
Quiescent Supply
CC
Current
Test ConditionValue
V
(V)
CC
= 25°C
A
Min.Typ. Max.Min.Max. Min. Max.
-40 to 85°C -55 to 125°C
T
2.01.51.51.5
3.62.42.42.4
2.00.50.50.5
3.60.80.80.8
2.0
3.0
2.0
3.0
3.6
3.6
IO=-50 µA
I
=-50 µA
O
I
=-4 mA
O
=50 µA
I
O
I
=50 µA
O
I
=4 mA
O
= 5V or GND
V
I
= VCC or GND
V
I
1.92.01.91.9
2.93.02.92.9
2.582.482.4
0.00.10.10.1
0.00.10.10.1
0.360.440.55
± 0.1± 1± 1µA
22020µA
74LVX27
Unit
V3.02.02.02.0
V3.00.80.80.8
V3.0
V3.0
DYNAMIC SWITCHING CHARACTERISTICS
Test ConditionValue
T
SymbolParameter
V
CC
(V)
V
V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2)
Dynamic High
IHD
Voltage Input (note
3.3
3.32
= 50 pF
C
L
1, 3)
V
Dynamic Low
ILD
Voltage Input (note
3.30.8
1, 3)
1) Worst c ase package .
2) Max number of outp ut s defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
(V
), f=1MHz.
IHD
= 25°C
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
0.30.5
-0.5-0.3
ILD
Unit
V
), 0V to threshold
3/8
Page 4
74LVX27
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
Test ConditionValue
T
SymbolParameter
t
PLH tPHL
Propagation Delay
Time
3.3
3.3
t
OSLH
t
OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HI GH or LOW
2) Param eter guaran teed by design
(*) Vol tage range is 3.3V ±
Output To Output
Skew Time (note1,
2)
0.3V
3.3
C
V
CC
(V)
L
(pF)
2.7155.28.61.010.51.012.0
2.7508.013.51.015.41.017.0
(*)
154.16.21.07.51.09.0
(*)
506.69.71.011.01.012.5
2.7500.51.01.51.5
(*)
50
= 25°C
A
Min.Typ. Max.Min.Max. Min. Max.
0.51.01.51.5
CAPACITIVE CHARACTERISTICS
Test ConditionValue
T
SymbolParameter
V
CC
(V)
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance
3.34101010pF
3.319pF
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= 25°C
A
Min.Typ. Max.Min.Max. Min. Max.
-40 to 85°C -55 to 125°C
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + ICC/3 (per gate)
CC(opr)
Unit
ns
ns
Unit
4/8
Page 5
TEST CIRCUIT
CL =15/50pF or equivalent (i ncludes jig and probe cap acitance)
Information furnished is bel ieved to be accurate and reliable. However, STMicroe lectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No li cense is granted by implication or otherwise unde r any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information
previously supplied. S TMicroelectronics products are not authorized for use as critica l components in life suppo rt devices or
systems without express written approval of STMicroelectronics.
Australi a - Brazil - Chi na - Finlan d - F rance - Germany - Hong Kong - India - Ital y - Japan - Ma l aysia - Malta - Morocco