Datasheet 74LVX245M, 74LVX245TTR Datasheet (SGS Thomson Microelectronics)

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1/9July 2001
HIGH SPEED:
t
PD
=4.7ns (TYP.) at VCC = 3.3V
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
V
IL
= 0.8V, VIH = 2V at VCC =3V
LOW POWER DISSIPATION:
I
CC
= 4 µA (MAX.) at TA=25°C
LOW NOISE:
V
OLP
= 0.5V (TYP.) at VCC =3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = IOL = 4 mA (MIN) at VCC =3V
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RAN GE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 245
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVX245 is a low voltage CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C
2
MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. This IC is intended for two-way asynchronous communication between data busses; the direction of data transmission is determined by
DIR input. The enable input G
can be used to disable the device so that the busses are effe ctively isolated . Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against stat ic discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z state must be held HIGH or LOW.
74LVX245
LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER
(3-STATE) WITH 5V TOLERANT INPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74LVX245M 74LVX245MTR
TSSOP 74LVX245TTR
TSSOPSOP
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74LVX245
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INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
X :Don‘t Care Z : High Impedance
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
RECOMMENDED OPERATING CONDITIONS
1) Truth T abl e guaranteed: 1.2V to 3.6V
2) V
IN
from 0.8V to 2.0V
PIN No SYMBOL NAME AND FUNCTION
1 DIR Directional Control
2, 3, 4, 5, 6,
7, 8, 9
A1 to A8 Data Inputs/Outputs
18, 17, 16, 15, 14, 13,
12, 11
B1 to B8 Data Inputs/Outputs
19 G
Output Enable Input 10 GND Ground (0V) 20 V
CC
Positive Supply Voltage
INPUTS FUNCTION
OUTPUT
G
DIR A BUS B BUS
L L OUTPUT INPUT A = B L H INPUT OUTPUT B = A
HXZZZ
Symbol Parameter Value Unit
V
CC
Supply Voltage
-0.5 to +7.0 V
V
I
DC Input Voltage
-0.5 to +7.0 V
V
O
DC Output Voltage -0.5 to VCC + 0.5
V
I
IK
DC Input Diode Current
- 20 mA
I
OK
DC Output Diode Current
± 20 mA
I
O
DC Output Current
± 25 mA
I
CC
or I
GND
DC VCC or Ground Current
± 50 mA
T
stg
Storage Temperature
-65 to +150 °C
T
L
Lead Temperature (10 sec)
300 °C
Symbol Parameter Value Unit
V
CC
Supply Voltage (note 1)
2 to 3.6 V
V
I
Input Voltage
0 to 5.5 V
V
O
Output Voltage 0 to V
CC
V
T
op
Operating Temperature
-55 to 125 °C
dt/dv
Input Rise and Fall Time (note 2) (V
CC
= 3V)
0 to 100 ns/V
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74LVX245
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DC SPECIFICATIONS
DYNAMIC SWITCHING CHARACTERISTICS
1) Worst c ase package.
2) Max number of output s defined as (n). Dat a i nputs are driven 0V to 3.3V, (n -1) outputs switc hi ng and one out put at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
IH
High Level Input Voltage
2.0 1.5 1.5 1.5 V3.0
2.0 2.0 2.0
3.6
2.4 2.4 2.4
V
IL
Low Level Input Voltage
2.0 0.5 0.5 0.5 V3.0 0.8 0.8 0.8
3.6 0.8 0.8 0.8
V
OH
High Level Output Voltage
2.0
IO=-50 µA
1.9 2.0 1.9 1.9 V3.0
I
O
=-50 µA
2.9 3.0 2.9 2.9
3.0
I
O
=-4 mA
2.58 2.48 2.4
V
OL
Low Level Output Voltage
2.0
I
O
=50 µA
0.0 0.1 0.1 0.1 V3.0
I
O
=50 µA
0.0 0.1 0.1 0.1
3.0
I
O
=4 mA
0.36 0.44 0.55
I
OZ
High Impedance Output Leakage Current
3.6
V
I
= VIH or V
IL
VO = VCC or GND
±0.25 ± 2.5 ± 5 µA
I
I
Input Leakage Current
3.6
V
I
= 5V or GND
± 0.1 ± 1 ± 1 µA
I
CC
Quiescent Supply Current
3.6
V
I
= VCC or GND
44040µA
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
OLP
Dynamic Low Voltage Quiet Output (note 1, 2)
3.3
C
L
= 50 pF
0.5 0.8
V
V
OLV
-0.8 -0.5
V
IHD
Dynamic High Voltage Input (note 1, 3)
3.3 2.0
V
ILD
Dynamic Low Voltage Input (note 1, 3)
3.3 0.8
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74LVX245
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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch­ing in the same directio n, either HIGH or LO W
2) Param eter guarante ed by design (*) Vol tage range is 3.3V ±
0.3V
CAPACITIVE CHARACTERISTICS
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= CPD x VCC x fIN + ICC/8 (per c ircuit )
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
t
PLH
t
PHL
Propagation Delay Time
2.7
15 6.1 11.4 1.0 13.5 1.0 15.0
ns
2.7
50 8.6 14.9 1.0 17.0 1.0 18.0
3.3
(*)
15 4.5 7.1 1.0 8.5 1.0 9.5
3.3
(*)
50 7.2 10.6 1.0 12.0 1.0 13.0
t
PZL
t
PZH
Output Enable Time
2.7 15 7.1 13.8 1.0 16.5 1.0 17.5 ns
2.7 50 9.6 17.3 1.0 20.0 1.0 21.0
3.3
(*)
15 5.5 8.8 1.0 10.5 1.0 12.
3.3
(*)
50 8.0 12.3 1.0 14.0 1.0 15.0
t
PLZ
t
PHZ
Output Disable Time
2.7 50 11.6 16.0 1.0 19.0 1.0 20.5 ns
3.3
(*)
50 9.7 11.4 1.0 13.0 1.0 14.5
t
OSLH
t
OSHL
Output to Output Skew Time (note 1,2)
2.7 50 0.5 1.0 1.5 1.5 ns
3.3
(*)
50 0.5 1.0 1.5 1.5
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
C
IN
Input Capacitance
3.3 5 10 10 pF
C
i/o
Input/Output Capacitance
3.3 10 15 15 pF
C
PD
Power Dissipation Capacitance (note 1)
3.3
f
IN
= 10MHz
32 pF
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74LVX245
5/9
TEST CIRCUIT
CL =15/50pF or equivalent (includes jig and probe capacitance) R
L
= R1 = 1Kor equivalent
R
T
= Z
OUT
of pulse generator (typically 50)
WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
TEST SWITCH
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
V
CC
t
PZH
, t
PHZ
GND
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74LVX245
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WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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74LVX245
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DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 2.65 0.104 a1 0.1 0.2 0.004 0.008 a2 2.45 0.096
b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.012
C 0.5 0.020
c1 45° (typ.)
D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419
e 1.27 0.050 e3 11.43 0.450
F 7.40 7.60 0.291 0.300
L 0.50 1.27 0.020 0.050
M 0.75 0.029 S8° (max.)
SO-20 MECHANICAL DATA
PO13L
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74LVX245
8/9
DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 6.4 6.5 6.6 0.252 0.256 0.260
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0° 8°0° 8°
L 0.45 0.60 0.75 0.018 0.024 0.030
TSSOP20 MECHANICAL DATA
c
E
b
A2
A
E1
D
1
PIN 1 IDENTIFICATION
A1
L
K
e
0087225C
Page 9
74LVX541
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