Datasheet 74LVX238TTR, 74LVX238MTR, 74LVX238M Datasheet (SGS Thomson Microelectronics)

74LVX238

LOW VOLTAGE CMOS 3 TO 8 LINE DECODER

WITH 5V TOLERANT INPUTS

■ HIGH SPEED :

t

= 5.5ns (TYP.) at V

PD

■ 5V TOLERANT INPUTS

■ INPUT VOLTAGE LEVEL :

V

=0.8V , VIH=2V at VCC=3V

IL

■ LOW POWER DISSIPATION:

I

= 2 µA (MAX.) at TA=25°C

CC

■ LOW NOISE:

V

= 0.3V (TYP.) at VCC = 3.3V

OLP

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

| = IOL = 4mA (MIN)

OH

■ BALANCED PROPAGATION DELAYS:

t

≅ t

PLH

■ OPERATING VOL TAGE RANGE:

V

CC

■ PIN AND FUNCTION COMPATIBLE WITH

PHL

(OPR) = 2V to 3.6V (1.2V Data Retention)

CC

= 3.3V

74 SERIES 138

■ IMPROVED LATCH-UP IMMUNITY

■ POWER DOWN PROTECTION ON INPUTS

DESCRIPTION

The 74LVX238 is a low voltage CMOS 3 TO 8
LINE DECODER fabricated with sub-micron
silicon gate and double-layer metal wiring C

2

MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
If the device is enabled, 3 binary select (A, B, and
C) determine which one of the outputs will go high.
If enable input G1 is held low or either G2A

or G2B

TSSOPSOP

ORDER CODES

PACKAGE TUBE T & R

SOP 74LVX238M 74LVX238MTR

TSSOP 74LVX238TTR

is held high, the decoding function is inhibited and
all the 8 outputs go low.
Tree enable inpu ts are provided to ease cascade
connection and application of address decoders
for memory systems.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

1/9July 2001

74LVX238

INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

PIN No SYMBOL NAME AND FUNCTION

1, 2, 3 A, B, C Address Inputs

4, 5 G2A

6 G1 Enable Input

15, 14, 13,

12, 1 1, 10, 9,

7
8 GND Ground (0V)

16 V

TRUTH TABLE

, G2B Enable Inputs

Y0 to Y7 Outputs

CC

Positive Supply Voltage

INPUTS

ENABLE SELECT

G2B

X : Don’t Care

G2A G1 C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

XXLXXXLLLLLLLL
XHXXXXLLLLLLLL
HXXXXXLLLLLLLL

LLHLLLHLLLLLLL
LLHLLHLHLLLLLL
LLHLHLLLHLLLLL
LLHLHHLLLHLLLL
LLHHLLLLLLHLLL
LLHHLHLLLLLHLL
LLHHHLLLLLLLHL
LLHHHHLLLLLLLH

OUTPUTS

LOGIC DIAGRAM

This log i c diagram has not be used to esti m at e propagation delays

2/9

74LVX238

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

V

V

I

I

OK

I

I

or I

CC

T

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit

V

V

V

T

dt/dv

1) Truth T abl e guarante ed: 1.2V to 3.6 V

from 0.8V to 2.0V

2) V

IN

Supply Voltage

CC

DC Input Voltage

I

DC Output Voltage -0.5 to VCC + 0.5

O

DC Input Diode Current

IK

DC Output Diode Current
DC Output Current

O

DC VCC or Ground Current

GND

Storage Temperature

stg

Lead Temperature (10 sec)

L

Supply Voltage (note 1)

CC

Input Voltage

I

Output Voltage 0 to V

O

Operating Temperature

op

Input Rise and Fall Time (note 2) (V

= 3.3V)

CC

-0.5 to +7.0 V

-0.5 to +7.0 V

- 20 mA

± 20 mA
± 25 mA
± 50 mA

-65 to +150 °C
300 °C

2 to 3.6 V
0 to 5.5 V

CC

-55 to 125 °C
0 to 100 ns/V

V

V

DC SPECIFICATIONS

Symbol Parameter

V

V

V

V

I

High Level Input

IH

Voltage

Low Level Input

IL

Voltage

High Level Output

OH

Voltage

Low Level Output

OL

Voltage

I

Input Leakage

I

Current
Quiescent Supply

CC

Current

Test Condition Value

V

(V)

CC

T

A

Min. Typ. Max. Min. Max. Min. Max.

-40 to 85°C -55 to 125°C

= 25°C

2.0 1.5 1.5 1.5

3.6 2.4 2.4 2.4

2.0 0.5 0.5 0.5

3.6 0.8 0.8 0.8
=-50 µA

2.0

3.0

2.0

3.0

3.6

3.6

I

O

I

=-50 µA

O

I

=-4 mA

O

=50 µA

I

O

I

=50 µA

O

I

=4 mA

O

= 5V or GND

V

I

= VCC or GND

V

I

1.9 2.0 1.9 1.9

2.9 3.0 2.9 2.9

2.58 2.48 2.4

0.0 0.1 0.1 0.1

0.0 0.1 0.1 0.1

0.36 0.44 0.55

± 0.1 ± 1 ± 1 µA

22020µA

Unit

V3.0 2.0 2.0 2.0

V3.0 0.8 0.8 0.8

V3.0

V3.0

3/9

74LVX238

DYNAMIC SWITCHING CHARACTERISTICS

Test Condition Value

T

Symbol Parameter

V
V

V

Dynamic Low

OLP

Voltage Quiet

OLV

Output (note 1, 2)
Dynamic High

IHD

Voltage Input (note

V

CC

(V)

3.3

3.3 2
= 50 pF

C

L

= 25°C

A

Min. Typ. Max. Min. Max. Min. Max.

0.3 0.5

-0.5 -0.3

1, 3)

V

Dynamic Low

ILD

Voltage Input (note

3.3 0.8

1, 3)

1) Worst c ase package .

2) Max number of outp ut s defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.

3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
(V

), f=1MHz.

IHD

AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)

Test Condition Value

T

Symbol Parameter

t

PLH tPHL

Propagation Delay
Time
A, B, C to Y

3.3

3.3

t

PLH tPHL

Propagation Delay
Time
G1 to Y

3.3

3.3

t

PLH tPHL

Propagation Delay
Time

or G2B to Y

G2A

3.3

3.3

t

OSLH

t

OSHL

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch­ing in the same direction, either HI GH or LOW

2) Param eter guaran teed by design
(*) Vol tage range is 3.3V ±

Output To Output
Skew Time (note1,

2)

0.3V

3.3

C

V

CC

(V)

L

(pF)

2.7 15 7.1 13.8 1.0 16.5 1.0 18.5

2.7 50 9.6 17.3 1.0 20.0 1.0 22.0

(*)

15 5.5 8.8 1.0 10.5 1.0 11.5

(*)

50 8.0 12.3 1.0 14.0 1.0 15.0

2.7 15 8.7 16.3 1.0 19.5 1.0 205

2.7 50 11.2 19.8 1.0 23.0 1.0 25.0

(*)

15 6.8 10.6 1.0 12.5 1.0 13.5

(*)

50 9.3 14.1 1.0 16.0 1.0 17.0

2.7 15 8.8 16.0 1.0 18.5 1.0 19.5

2.7 50 11.3 19.5 1.0 22.0 1.0 23.0

(*)

15 6.9 10.4 1.0 11.5 1.0 13.5

(*)

50 9.4 13.9 1.0 15.0 1.0 17.0

2.7 50 0.5 1.0 1.5 1.5

(*)

50

= 25°C

A

Min. Typ. Max. Min. Max. Min. Max.

0.5 1.0 1.5 1.5

-40 to 85°C -55 to 125°C

), 0V to threshold

ILD

-40 to 85°C -55 to 125°C

Unit

V

Unit

ns

ns

ns

ns

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74LVX238

CAPACITIVE CHARACTERISTICS

Test Condition Value

T

Symbol Parameter

C

C

Input Capacitance

IN

Power Dissipation

PD

Capacitance

V

CC

(V)

3.3 4101010pF

= 10MHz

3.3

f

IN

= 25°C

A

Min. Typ. Max. Min. Max. Min. Max.

34 pF

(note 1)

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (R ef er to Test Circ ui t). Averag e operating current can be obtained by t he following equation. I

TEST CIRCUIT

-40 to 85°C -55 to 125°C

= CPD x VCC x f

CC(opr)

+ I

IN

CC

Unit

CL =15/50pF or equivalent (i ncludes jig and probe cap acitance)
R

= Z

of pulse generator (typically 50Ω)

T

OUT

5/9

74LVX238

WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING OUTPUTS (f=1MHz; 50% duty cycle)

WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty cycle)

6/9

SO-16 MECHANICAL DATA

74LVX238

DIM.

A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064

b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010

C 0.5 0.019

c1 45° (typ.)

D 9.8 10 0.385 0.393
E 5.8 6.2 0.228 0.244

e 1.27 0.050
e3 8.89 0.350

F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208

L 0.5 1.27 0.019 0.050

M 0.62 0.024
S8° (max.)

MIN. TYP MAX. MIN. TYP. M AX.

mm. inch

PO13H

7/9

74LVX238

TSSOP16 MECHANICAL DATA

mm. inch

DIM.

MIN. TYP MAX. MIN. TYP. M AX.

A 1.2 0.047

A1 0.05 0.15 0.002 0.004 0.006

A2 0.8 1 1.05 0.031 0.039 0.041

b 0.19 0.30 0.007 0.012

c 0.09 0.20 0.004 0.0089

D 4.9 5 5.1 0.193 0.197 0.201

E 6.2 6.4 6.6 0.244 0.252 0.260

E1 4.3 4.4 4.48 0.169 0.173 0.176

e 0.65 BSC 0.0256 BSC

K0° 8°0° 8°

L 0.45 0.60 0.75 0.018 0.024 0.030

A2

A

A1

b

e

c

K

L

E

D

E1

PIN 1 IDENTIFICATION

8/9

1

0080338D

74LVX238

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