Page 1
1/10July 2001
■ HIGH SPEED :
f
MAX
= 180MHz (TYP.) at V
CC
= 3.3V
■ 5V TOLERANT INPUTS
■ INPUT VOLTAGE LEVEL :
V
IL
=0.8V , VIH=2V at VCC=3V
■ LOW POWER DISSIPATION:
I
CC
= 4 µA (MAX.) at TA=25°C
■ LOW NOISE:
V
OLP
= 0.3V (TYP.) at VCC = 3.3V
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = IOL = 4mA (MIN)
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOL TAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 174
■ IMPROVED LATCH-UP IMMUNITY
■ POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX174 is a low voltage CMOS HEX
D-TYPE FLIP FLOP WITH CLEAR NON
INVERTING fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
Information signals applied to D inputs are
transferred to the Q o utputs on the positive going
edge of the clock pulse.
When the CLE AR
input is held low, the Q outputs
are held low independently of the other inputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVX174
LOW VOLTAGE CMOS HEX D-TYPE FLIP-FLOP WITH CLEAR
WITH 5V TOLERANT INPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74LVX174M 74LVX174MTR
TSSOP 74LVX174TTR
TSSOPSOP
Page 2
74LVX174
2/10
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
X : Don’t Care
LOGIC DIAGRAM
This log i c diagram has not be used to esti m at e propagation delays
PIN No SYMBOL NAME AND FUNCTION
1 CLEAR
Asynchronous Maste r
Reset (Active LOW)
2, 5, 7, 10,
12, 15
Q0 to Q5 Flip-Flop Outputs
3, 4, 6, 11,
13, 14
D0 to D5 Data Inputs
9 CLOCK Clock Input (LOW-to-HIGH,
Edge Triggered)
8 GND Ground (0V)
16 V
CC
Positive Supply Voltage
INPUTS OUTPUTS
FUNCTION
CLEAR
D CLOCK Q
L X X L CLEAR
HL L
HH H
HX
Q
n
NO CHANGE
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74LVX174
3/10
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
1) Truth T abl e guarante ed: 1.2V to 3.6 V
2) V
IN
from 0.8V to 2.0V
DC SPECIFICATIONS
Symbol Parameter Value Unit
V
CC
Supply Voltage
-0.5 to +7.0 V
V
I
DC Input Voltage
-0.5 to +7.0 V
V
O
DC Output Voltage -0.5 to VCC + 0.5
V
I
IK
DC Input Diode Current
- 20 mA
I
OK
DC Output Diode Current
± 20 mA
I
O
DC Output Current
± 25 mA
I
CC
or I
GND
DC VCC or Ground Current
± 50 mA
T
stg
Storage Temperature
-65 to +150 °C
T
L
Lead Temperature (10 sec)
300 °C
Symbol Parameter Value Unit
V
CC
Supply Voltage (note 1)
2 to 3.6 V
V
I
Input Voltage
0 to 5.5 V
V
O
Output Voltage 0 to V
CC
V
T
op
Operating Temperature
-55 to 125 °C
dt/dv
Input Rise and Fall Time (note 2) (V
CC
= 3.3V)
0 to 100 ns/V
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
IH
High Level Input
Voltage
2.0 1.5 1.5 1.5
V3.0 2.0 2.0 2.0
3.6 2.4 2.4 2.4
V
IL
Low Level Input
Voltage
2.0 0.5 0.5 0.5
V3.0 0.8 0.8 0.8
3.6 0.8 0.8 0.8
V
OH
High Level Output
Voltage
2.0
I
O
=-50 µA
1.9 2.0 1.9 1.9
V3.0
I
O
=-50 µA
2.9 3.0 2.9 2.9
3.0
I
O
=-4 mA
2.58 2.48 2.4
V
OL
Low Level Output
Voltage
2.0
I
O
=50 µA
0.0 0.1 0.1 0.1
V3.0
I
O
=50 µA
0.0 0.1 0.1 0.1
3.0
I
O
=4 mA
0.36 0.44 0.55
I
I
Input Leakage
Current
3.6
V
I
= 5V or GND
± 0.1 ± 1 ± 1 µA
I
CC
Quiescent Supply
Current
3.6
V
I
= VCC or GND
44040µA
Page 4
74LVX174
4/10
DYNAMIC SWITCHING CHARACTERISTICS
1) Worst c ase package .
2) Max number of outp ut s defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
OLP
Dynamic Low
Voltage Quiet
Output (note 1, 2)
3.3
C
L
= 50 pF
0.3 0.8
V
V
OLV
-0.8 -0.3
V
IHD
Dynamic High
Voltage Input (note
1, 3)
3.3 2
V
ILD
Dynamic Low
Voltage Input (note
1, 3)
3.3 0.8
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74LVX174
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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HI GH or LOW
2) Param eter guaran teed by design (*) Voltage range is 3.3V ±
0.3V
CAPACITIVE CHARACTERISTICS
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= CPD x VCC x f
IN
+ ICC/n (p er ci rcui t )
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
t
PLH tPHL
Propagation Delay
Time CLOCK to Q
2.7 15 7.6 14.5 1.0 17.5 1.0 18.5
ns
2.7 50 10.1 18.0 1.0 21.0 1.0 22.0
3.3
(*)
15 5.9 9.3 1.0 11.0 1.0 12.0
3.3
(*)
50 8.4 12.8 1.0 14.5 1.0 15.5
t
PLH tPHL
Propagation Delay
Time CLEAR
to Q
2.7 15 7.9 15.0 1.0 18.5 1.0 19.5
ns
2.7 50 10.4 18.5 1.0 22.0 1.0 23.0
3.3
(*)
15 6.2 9.7 1.0 11.5 1.0 12.5
3.3
(*)
50 8.7 13.2 1.0 15.0 1.0 16.0
t
WL
CLEAR pulse
Width, HIGH
2.7 6.5 7.5 7.5
ns
3.3
(*)
5.0 5.0 5.0
t
W
CLOCK pulse
Width
2.7 6.5 7.5 7.5
ns
3.3
(*)
5.0 5.0 5.0
t
S
Setup Time Q to
CLOCK HIGH or
LOW
2.7 7.5 8.5 8.5
ns
3.3
(*)
5.0 6.0 6.0
t
h
Hold Time Q to
CLOCK HIGH or
LOW
2.7 0.0 0.0 0.0
ns
3.3
(*)
0.0 0.0 0.0
t
REM
Recovery Time
CLEAR
to Q
2.7 4.5 4.5
ns
3.3
(*)
3.0 3.0
f
MAX
Maximum Clock
Frequency
2.7 15 65 130 55
MHz
2.7 50 45 60 40
3.3
(*)
15 115 180 95
3.3
(*)
50 65 95 55
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
2.7 50 0.5 1.0 1.5 1.5
ns
3.3
(*)
50
0.5 1.0 1.5 1.5
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
C
IN
Input Capacitance
3.3 5 10 10 pF
C
PD
Power Dissipation
Capacitance
(note 1)
3.3
f
IN
= 10MHz
23 pF
Page 6
74LVX174
6/10
TEST CIRCUIT
CL =15/50pF or equivalent (i ncludes jig and probe cap acitance)
R
T
= Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM 1 : PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1M Hz; 50% duty cycle)
Page 7
74LVX174
7/10
WAVEFORM 2 : PROPAGATION DELAYS (f=1MHz; 50 % d u ty cycle)
WAVEFORM 3: RECOVERY TIME, MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle)
Page 8
74LVX174
8/10
DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45° (typ.)
D 9.8 10 0.385 0.393
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 8.89 0.350
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.62 0.024
S8° (max.)
SO-16 MECHANICAL DATA
PO13H
Page 9
74LVX174
9/10
DIM.
mm. inch
MIN. TYP MAX. M IN. TYP. MAX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0° 8°0° 8°
L 0.45 0.60 0.75 0.018 0.024 0.030
TSSOP16 MECHANICAL DATA
c
E
b
A2
A
E1
D
1
PIN 1 IDENTIFICATION
A1
L
K
e
0080338D
Page 10
74LVX174
10/10
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