The 74LVX05 is a low voltage CMOS OPEN
DRAIN HEX INVERTER fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
The internal circuit is composed of 3 stages
including buffer ou tput, whi ch provid es hig h no ise
immunity and stable output.
TSSOPSOP
Table 1: Order Codes
PACKAGET & R
SOP74LVX05MTR
TSSOP74LVX05TTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the sa m e di rection, ei ther HIGH or LOW
2) Param eter guaran teed by design
(*) Voltage range is 3.3V ±
Propagation Delay
PZL
Time
Propagation Delay
PLZ
Time
Output To Output
Skew Time (note1,
2)
0.3V
V
C
CC
(V)
L
(pF)
2.7155.47.79.010.0
2.7506.08.710.011.5
(*)
3.3
3.3
154.87.08.19.0
(*)
505.37.68.89.5
2.75010.514.71.015.01.016.0
(*)
3.3
50
2.7500.51.01.51.5
(*)
3.3
50
T
A
Min.Typ. Max.Min.Max. Min. Max.
9.613.51.014.01.015.0
0.51.01.51.5
Table 9: Capacitive Characteristics
-40 to 85°C -55 to 125°C
Unit
ns
ns
ns
Test ConditionValue
SymbolParameter
C
Input Capacitance
IN
C
C
Output Capacitance
OUT
Power Dissipation
PD
Capacitance
T
V
CC
(V)
A
Min.Typ. Max.Min.Max.Min.Max.
3.35.4101010pF
3.37.3pF
3.32.6pF
-40 to 85°C -55 to 125°C
Unit
= 25°C
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= CPD x VCC x fIN + ICC/6 (per gate)
CC(opr)
Figure 3: Test Circuit
CL = 15/50pF or e qui valent (inc lu des jig and pro be capacitan ce)
R
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