Datasheet 74LVX03TTR, 74LVX03MTR, 74LVX03M Datasheet (SGS Thomson Microelectronics)

Page 1
74LVX03
LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE
(OPEN DRAIN) WITH 5V TOLERANT INPUTS
HIGH SPEED :
t
= 4.8ns (TYP.) at V
PD
5V TOLERANT INPUTS
V
=0.8V , VIH=2V at VCC=3V
IL
LOW POWER DISSIPATION:
I
= 2 µA (MAX.) at TA=25°C
CC
LOW NOISE:
V
= 0.3V (TYP.) at VCC = 3.3V
OLP
OPERATING VOL TAGE RANGE:
V
(OPR) = 2V to 3.6V (1.2V Data Retention)
CC
PIN AND FUNCTION COMPATIBLE WITH
CC
= 3.3V
74 SERIES 03
IMPROVED LATCH-UP IMMUNITY
POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX03 is a low voltage CMOS OPEN DRAIN HEX INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C
2
MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. The internal circuit is composed of 3 stages including buffer ou tput, which provides high noise immunity and stable output. This device can, with an external pull-up resistor, be used in wired AND configuration. This d evice
TSSOPSOP
ORDER CODES
PACKAGE TUBE T & R
SOP 74LVX03M 74LVX03MTR
TSSOP 74LVX03TTR
can also be used as a led driver a nd in any other application requiring a current sink. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against stat ic discharge, giving them 2KV ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8July 2001
Page 2
74LVX03
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1, 4, 9, 12 1A to 4A Data Inputs
2, 5, 10, 13 1B to 4B Data Inputs
3, 6, 8, 11 1Y to 4Y Data Outputs
7 GND Ground (0V)
14
V
CC
TRUTH TABLE
ABY
LLZ
LHZ HLZ HHL
Z: High Impedance
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
I
or I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
Positive Supply Voltage
-0.5 to +7.0 V
-0.5 to +7.0 V V
- 20 mA
± 20 mA ± 25 mA ± 50 mA
-65 to +150 °C
300 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
dt/dv
1) Truth T abl e guarante ed: 1.2V to 3.6 V
2) V
from 0.8V to 2.0V
IN
2/8
Supply Voltage (note 1)
CC
Input Voltage
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 2) (V
= 3.3V)
CC
2 to 3.6 V 0 to 5.5 V
CC
-55 to 125 °C 0 to 100 ns/V
V
Page 3
DC SPECIFICATIONS
Symbol Parameter
V
High Level Input
IH
Voltage
Low Level Input
V
IL
Voltage
V
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
I
High Impedance
OZ
Output Leakage Current
I
Quiescent Supply
CC
Current
Test Condition Value
V
(V)
CC
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
-40 to 85°C -55 to 125°C
T
2.0 1.5 1.5 1.5
3.6 2.4 2.4 2.4
2.0 0.5 0.5 0.5
3.6 0.8 0.8 0.8
2.0
3.0
3.6
3.6
3.6
IO=50 µA I
=50 µA
O
I
=4 mA
O
= 5V or GND
V
I
= VIH or V
V
I
IL
VO = VCC or GND
= VCC or GND
V
I
0.0 0.1 0.1 0.1
0.0 0.1 0.1 0.1
0.36 0.44 0.55
± 0.1 ± 1 ± 1 µA
±0.25 ± 2.5 ± 5.0 µA
22020µA
74LVX03
Unit
V3.0 2.0 2.0 2.0
V3.0 0.8 0.8 0.8
V3.0
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition Value
T
Symbol Parameter
V
CC
(V)
V V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2) Dynamic High
IHD
Voltage Input (note
3.3
3.3 2 = 50 pF
C
L
1, 3)
V
Dynamic Low
ILD
Voltage Input (note
3.3 0.8
1, 3)
1) Worst c ase package .
2) Max number of outp ut s defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V (V
), f=1MHz.
IHD
= 25°C
A
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
0.3 0.5
-0.5 -0.3
ILD
Unit
V
), 0V to threshold
3/8
Page 4
74LVX03
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
Test Condition Value
T
Symbol Parameter
t
Propagation Delay
PZL
Time
3.3
3.3
t
t
OSLH
t
OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch­ing in the same direction, either HI GH or LOW
2) Param eter guaran teed by design (*) Vol tage range is 3.3V ±
Propagation Delay
PLZ
Time Output To Output
Skew Time (note1,
2)
3.3
3.3
0.3V
C
V
CC
(V)
L
(pF)
2.7 15 5.4 7.7 9.0 9.5
2.7 50 6.0 8.7 10.0 11.0
(*)
15 4.8 7.0 8.1 8.5
(*)
50 5.3 7.6 8.8 9.5
2.7 50 10.5 14.7 1.0 15.0 1.0 17.0
(*)
50
2.7 50 0.5 1.0 1.5 1.5
(*)
50
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
9.6 13.5 1.0 14.0 1.0 15.0
0.5 1.0 1.5 1.5
CAPACITIVE CHARACTERISTICS
Test Condition Value
-40 to 85°C -55 to 125°C
Unit
ns
ns
ns
Symbol Parameter
C
C
C
Input Capacitance
IN
Output
OUT
Capacitance Power Dissipation
PD
Capacitance
= 25°C
V
CC
(V)
A
Min. Typ. Max. Min. Max. Min. Max.
3.3 5.4 10 10 10 pF
3.3 7.3 pF
3.3 2.6 pF
-40 to 85°C -55 to 125°C
Unit
T
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= CPD x VCC x fIN + ICC/6 (per gate)
CC(opr)
4/8
Page 5
TEST CIRCUIT
CL = 15/50pF or e qui valent (includes jig and probe capa ci t ance) R
= R1 = 1Kor equivalent
L
= Z
R
of pulse generator (typically 50)
T
OUT
WAVEFORM : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
74LVX03
5/8
Page 6
74LVX03
SO-14 MECHANICAL DATA
DIM.
A 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064
b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010
C 0.5 0.019 c1 45° (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050 e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026 S8° (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
6/8
PO13G
Page 7
74LVX03
TSSOP14 MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0° 8°0° 8°
L 0.45 0.60 0.75 0.018 0.024 0.030
A2
A
A1
b
e
c
K
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
7/8
Page 8
74LVX03
Information furnished is bel ieved to be accurate and reliable. However, STMicroe lectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No li cense is granted by implication or otherwise unde r any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information previously supplied. S TMicroelectronics products are not authorized for use as critica l components in life suppo rt devices or systems without express written approval of STMicroelectronics.
Australi a - Brazil - Chi na - Finlan d - F rance - Germany - Hong Kong - India - Ital y - Japan - Ma l aysia - Malta - Morocco
© The ST logo is a registered trademark of STMicroelectronics
© 2001 STM icroelectronics - Pr inted in Ital y - All Rights Reserved
STMicr o el ectronics GROUP OF COMPANIES
Singapo re - Spain - Sweden - Swit zerland - Un i ted Kingdom
© http://www.st.com
8/8
Loading...