Datasheet 74LVTH244SJX, 74LVTH244SJ, 74LVTH244MTCX, 74LVTH244MTC, 74LVTH244MSAX Datasheet (Fairchild Semiconductor)

© 1999 Fairchild Semiconductor Corporation DS500154 www.fairchildsemi.com

July 1999
Revised August 1999

74LVT244 •74LVTH244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

74LVT244 •74LVTH244
Low Voltage Octal Buffer/Line Driver

with 3-STATE Outputs

General Description

The LVT244 and LVTH244 are octal buffers and line drivers
designed to be employed as memory address drivers,
clock drivers and bus oriented transmitters or receivers
which provide improved PC boa rd den sity.

The LVTH244 data inputs include bush old, eliminati ng the
need for external pull-up resistors to hold unused inputs.

These octal buffers and line drivers are designed for low­voltage (3.3V) V

CC

applications, but wit h the capability to

provide a TTL interface to a 5V environment. The LVT244
and LVTH244 are fabricated with an advanced BiCMOS
technology to achieve h igh speed operation similar to 5V
ABT while maintaining low power dissipation.

Features

■ Input and output interface capability to systems at
5V V

CC

■ Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH244),
also available without bushold feat ure (74LVT244)

■ Live insertion/extraction per mitt ed

■ Power Up/Down high impedance provides glitch-free

bus loading

■ Outputs source/sink −32 mA/+64 mA

■ Functionally compatible with the 74 series 244

■ Latch-up performance exceeds 500 mA

Ordering Code:

Device also available in Tape and Reel. Specify by appending s uffix let te r “X” to the ordering code.

Logic Symbol

IEEE/IEC

Order Number Package Number Package Description

74LVT244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVT244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVT244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LVT244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVTH244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74LVTH244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74LVTH244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

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74LVT244 •74LVTH244

Connection Diagram Pin Descriptions

Truth Tables

H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance

Pin Names Description

OE

1

, OE

2

3-STATE Output
Enable Inputs

I

0–I7

Inputs

O

0–O7

Output

Inputs Outputs

OE

1

I

n

(Pins 12, 14, 16, 18)

LL L
LH H
HX Z

Inputs Outputs

OE

2

I

n

(Pins 3, 5, 7, 9)

LL L
LH H
HX Z

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74LVT244 •74LVTH244

Absolute Maximum Ratings(Note 1)

Recommended Operating Conditions

Note 1: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions

beyond those indica te d m ay adversely affect dev ic e reliability. Functional operation under absolute maxim um rated conditions is not imp lied.
Note 2: I

O

Absolute Maximum Rating must be observed.

Symbol Parameter Value Conditions Units

V

CC

Supply Voltage −0.5 to +4.6 V

V

I

DC Input Voltage −0.5 to +7.0 V

V

O

DC Output Voltage −0.5 to +7.0 Output in 3-STATE V

−0.5 to +7.0 Output in HIGH or LOW State (Note 2) V

I

IK

DC Input Diode Current −50 VI < GND mA

I

OK

DC Output Diode Current −50 VO < GND mA

I

O

DC Output Current 64 VO > VCCOutput at HIGH State

mA

128 V

O

> VCCOutput at LOW State

I

CC

DC Supply Current per Supply Pin ±64 mA

I

GND

DC Ground Current per Ground Pin ±128 mA

T

STG

Storage Temperature −65 to +150 °C

Symbol Parameter Min Max Units

V

CC

Supply Voltage 2.7 3.6 V

V

I

Input Voltage 0 5.5 V

I

OH

HIGH-Level Output Current −32

mA

I

OL

LOW-Level Output Current 64

T

A

Free-Air Operating Temperature −40 85 °C

∆t/∆V Input Edge Rate, V

IN

= 0.8V–2.0V, VCC = 3.0V 0 10 ns/V

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74LVT244 •74LVTH244

DC Electrical Characteristics

Note 3: All typical va lues are at VCC = 3.3V, TA = 25°C.
Note 4: Applies to bu s hold versions only (74LVTH244).
Note 5: An externa l driv er must source at leas t the specified current to s w it c h f rom LOW-to-HIGH.
Note 6: An externa l driv er must sink at least the sp ec if ied current to switch from H I GH-to-LOW.
Note 7: This is the increase in supply current f or each input that is at the spe c if ied voltage level rather t han V

CC

or GND.

Dynamic Switching Characteristics (Note 8)

Note 8: Characteriz ed in SOIC package. Guaranteed parameter, but not tes t ed.
Note 9: Max number of outputs defined a s (n ). n−1 data inputs are driven 0V to 3V. Output under test held LOW.

Symbol Parameter

V

CC

(V)

T A =−40°C to +85°C

Units Conditions

Min Typ Max

(Note 3)

V

IK

Input Clamp Diode Voltage 2.7 −1.2 V II = −18 mA

V

IH

Input HIGH Voltage 2.7–3.6 2.0

V

VO ≤ 0.1V or

V

IL

Input LOW Voltage 2.7–3.6 0.8 VO ≥ VCC − 0.1V

V

OH

Output HIGH Voltage 2.7–3.6 VCC−0.2 V IOH = −100 µA

2.7 2.4 V IOH = −8 mA

3.0 2.0 V IOH = −32 mA

V

OL

Output LOW Voltage 2.7 0.2 V IOL = 100 µA

2.7 0.5 V IOL = 24 mA

3.0 0.4 V IOL = 16 mA

3.0 0.5 V IOL = 32 mA

3.0 0.55 V IOL = 64 mA

I

I(HOLD)

Bushold Input Minimum Drive 3.0 75 µAVI = 0.8V
(Note 4) −75 µAVI = 2.0V
I

I(OD)

Bushold Input Over-Drive

Current to Change State

3.0 500 µA(Note 5)
(Note 4) −500 µA(Note 6)
I

I

Input Current 3.6 10 µAVI = 5.5V

Control Pins 3.6 ±1 µAVI = 0V or V

CC

Data Pins 3.6 −5 µAVI = 0V

1 µAVI = V

CC

I

OFF

Power Off Leakage Current 0 ±100 µA0V ≤ VI or VO ≤ 5.5V

I

PU/PD

Power up/down 3-STATE

0–1.5V ±100 µA

VO = 0.5V to 3.0V

Output Current VI = GND or V

CC

I

OZL

3-STATE Output Leakage Current 3.6 −5 µAVO = 0.5V

I

OZH

3-STATE Output Leakage Current 3.6 5 µAVO = 3.0V

I

OZH

+ 3-STATE Output Leakage Current 3.6 10 µAVCC < VO ≤ 5.5V

I

CCH

Power Supply Current 3.6 0.19 mA Outputs HIGH

I

CCL

Power Supply Current 3.6 5 mA Outputs LOW

I

CCZ

Power Supply Current 3.6 0.19 mA Outputs Disabled

I

CCZ

+ Power Supply Current 3.6 0.19 mA VCC ≤ VO ≤ 5.5V,

Outputs Disabled

∆I

CC

Increase in Power Supply Current 3.6 0.2 mA One Input at VCC − 0.6V
(Note 7) Other Inputs at VCC or GND

Symbol Parameter

V

CC

(V)

TA = 25°C

Units

Conditions

CL = 50 pF, RL = 500Ω

Min Typ Max

V

OLP

Quiet Output Maximum Dynamic V

OL

3.3 0.8 V (Note 9)

V

OLV

Quiet Output Minimum Dynamic V

OL

3.3 −0.8 V (Note 9)

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74LVT244 •74LVTH244

AC Electrical Characteristics

Note 10: All typical valu es are at VCC = 3.3V, TA = 25°C.
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specification applies to any out puts switching in the same direction, either HIGH-to-LOW (t

OSHL

) or LOW-to-HIGH (t

OSLH

). Parameter guaranteed by design.

Capacitance (Note 12)

Note 12: Capacitanc e is m easured at frequency f = 1 MHz, per MIL-STD-883, Method 3012.

Symbol Parameter

TA = −40°C to +85°C

CL = 50 pF, RL = 500Ω

Units

VCC = 3.3V ± 0.3V VCC = 2.7V

Min Typ Max Min Max

(Note 10)

t

PLH

Propagation Delay Data to Output 1.1 3.8 1.1 4.0

ns

t

PHL

1.3 3.9 1.3 4.2

t

PZH

Output Enable Time 1.1 4.5 1.1 5.3

ns

t

PZL

1.4 4.4 1.4 5.0

t

PHZ

Output Disable Time 1.9 4.9 1.9 5.1

ns

t

PLZ

1.8 4.4 1.8 4.4

t

OSHL

Output to Output Skew

1.0 1.0 ns

t

OSLH

(Note 11)

Symbol Parameter Conditions Typical Units

C

IN

Input Capacitance VCC = 0V, VI = 0V or V

CC

3pF

C

OUT

Output Capacitance VCC = 3.0V, VO = 0V or V

CC

6pF

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74LVT244 •74LVTH244

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

Package Number M20B

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M20D

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74LVT244 •74LVTH244

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

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74LVT244 •74LVTH244 Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

Package Number MSA20

Fairchild does not assume any responsibility for use of any circuitry described, no circuit pate nt licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or syste ms
which, (a) are intended for surgical implant into the
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to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the
user.

2. A critical component i n any compon ent of a lif e support
device or system whose failu re to perform can be rea­sonably expected to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.

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