•Input and output interface capability to systems at 5V supply
•Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
•Live insertion/extraction permitted
•No bus current loading when output is tied to 5V bus
•Power-up 3-State
•Power-up reset
•Latch–up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOLPARAMETER
t
PLH
t
PHL
C
C
I
CCZ
IN
I/O
Propagation delay
An to Bn or Bn to An
Input capacitanceVI = 0V or 3V4pF
I/O capacitanceOutputs disabled; V
Total supply currentOutputs disabled; VCC = 3.6V0.13mA
DESCRIPTION
The LVT652 is a high-performance BiCMOS product designed for
V
CC
This device combines low static and dynamic power dissipation with
high speed and high output drive.
The 74LVT652 transceiver/register consists of bus transceiver
circuits with 3-State outputs, D–type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes High. Output
Enable (OEAB, OEBA
bus management.
T
amb
CL = 50pF;
VCC = 3.3V
operation at 3.3V .
CONDITIONS
= 25°C; GND = 0V
= 0V or 3V10pF
I/O
74L VT652
) and Select (SAB, SBA) pins are provided for
TYPICALUNIT
2.8
2.6
ns
ORDERING INFORMATION
PACKAGESTEMPERATURE RANGE OUTSIDE NORTH AMERICANORTH AMERICADWG NUMBER
24-Pin Plastic SOL–40°C to +85°C74LVT652 D74LVT652 DSOT137-1
24-Pin Plastic SSOP Type II–40°C to +85°C74LVT652 DB74LVT652 DBSOT340-1
24-Pin Plastic TSSOP Type I–40°C to +85°C74LVT652 PW74LVT652PW DHSOT355-1
PIN CONFIGURATION
1
CPAB
2
SAB
3
OEAB
4
A0
5
A1
6
A2
7
A3
8
A4
9
A5
10
A6
11
A7
12
GND
24
23
22
21
20
19
18
17
16
15
14
13
SV00051
V
CC
CPBA
SBA
OEBA
B0
B1
B2
B3
B4
B5
B6
B7
PIN DESCRIPTION
PIN NUMBERSYMBOLFUNCTION
1, 23
CPAB /
CPBA
2, 22SAB / SBA
3, 21
4, 5, 6, 7, 8, 9,
10, 11
20, 19, 18, 17,
16, 15, 14, 13
OEAB /
OEBA
A0 – A7Data inputs/outputs (A side)
B0 – B7Data inputs/outputs (B side)
12GNDGround (0V)
24V
CC
A to B clock input / B to A
clock input
A to B select input / B to A
select input
A to B Output Enable input
(active-High) /
B to A Output Enable input
(active-Low)
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74LVT652.
REAL TIME BUS TRANSFER
BUS B TO BUS A
AA
REAL TIME BUS TRANSFER
BUS A TO BUS B
BBBB
74LVT652
The select pins determine whether data is stored or transferred
through the device in real time.
The output enable pins determine the direction of the data flow.
STORAGE FROM
A, B, OR A AND B
A
TRANSFER STORED DA TA
TO A OR B
A
}
OEABOEBA CPABCPBA SAB SBA
LLXXXL
OEABOEBA CPABCPBA SAB SBA
HHXX LX
}
}
OEABOEBA CPABCPBA SAB SBA
XH↑XXX
LXX↑XX
LH↑↑XX
}
OEABOEBA CPABCPBA SAB SBA
HLH | L H | L HH
SV00055
FUNCTION TABLE
INPUTSDATA I/O
OEABOEBACPABCPBASABSBAAnBn
L
L
X
H
L
L
L
L
H
H
HLH or LH or LHHOutputOutput
H = High voltage level
L = Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
*The data output function may be enabled or disabled by various signals at the OEBA
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
**If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be
DC supply voltage–0.5 to +4.6V
DC input diode currentVI < 0–50mA
DC input voltage
I
DC output diode currentVO < 0–50mA
DC output voltage
p
Storage temperature range–65 to +150°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
PARAMETERCONDITIONSRATINGUNIT
3
3
1,2
–0.5 to +7.0V
Output in Off–0.5 to +7.0V
Output in Low state128
Output in High state–64
74LVT652
RECOMMENDED OPERATING CONDITIONS
LIMITS
MINMAX
V
CC
V
V
V
I
OH
I
OL
∆t/∆vInput transition rise or fall rate; Outputs enabled10ns/V
T
amb
DC supply voltage2.73.6V
Input voltage05.5V
I
High-level input voltage2.0V
IH
Input voltage0.8V
IL
High-level output current–32mA
Low-level output current32mA
Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz64
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
74LVT652
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print codeDate of release: 05-96
Document order number:9397-750-03545
yyyy mmm dd
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