Page 1
INTEGRATED CIRCUITS
74LVT240
ABT octal inverting buffer (3-State)
Product specification
Supersedes data of 1994 May 16
IC23 Data Handbook
1998 Feb 19
Page 2
Philips Semiconductors Product specification
74L VT2403.3V Octal inverting buffer (3-State)
FEA TURES
•Octal bus interface
•3-State buffers
•Output capability: +64mA/-32mA
•TTL input and output switching levels
•Input and output interface capability to systems at 5V supply
•Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
•Power-up 3-State
•Live insertion/extraction permitted
•No bus current loading when output is tied to 5V bus
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model.
QUICK REFERENCE DATA
SYMBOL PARAMETER
C
t
PLH
t
PHL
C
OUT
I
CCZ
IN
Propagation delay
nAx to nYx
Input capacitance VI = 0V or 3.0V 4 pF
Output capacitance Outputs disabled; VO = 0V or 3.0V 8 pF
Total supply current Outputs disabled; VCC = 3.6V 0.12 mA
CL = 50pF;
VCC = 3.3V
DESCRIPTION
The LVT240 is a high-performance BiCMOS product designed for
V
operation at 3.3V .
CC
This device is an octal inverting buffer that is ideal for driving bus
lines. The device features two Output Enables (1OE
controlling four of the 3-State outputs.
CONDITIONS
T
= 25°C; GND = 0V
amb
TYPICAL UNIT
2.5
2.6
, 2OE), each
ns
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic SOL –40°C to +85°C 74LVT240 D 74LVT240 D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74LVT240 DB 74LVT240 DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT240 PW 74LVT240PW DH SOT360-1
PIN CONFIGURATION
1
1OE
1A0
2
2Y
3
3
4
1A1
5
2Y2
6
1A2
7
2Y
1
8
1A3
9
2Y
01Y3
10 11
GND
20
V
CC
19
2OE
18
1Y0
17
2A3
16
1
1Y
15
2A2
14
2
1Y
13
2A1
12
2A0
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 4, 6, 8 1A0 – 1A3 Data inputs
11, 13, 15, 17 2A0 – 2A3 Data inputs
18, 16, 14, 12 1Y0 – 1Y3 Data outputs
9, 7, 5, 3 2Y0 – 2Y3 Data outputs
1, 19 1OE, 2OE Output enables
10 GND Ground (0V)
20 V
CC
Positive supply voltage
SV00006
1998 Feb 19 853-1744 18991
2
Page 3
Philips Semiconductors Product specification
I
DC output current
mA
74LVT2403.3V Octal inverting buffer (3-State)
LOGIC SYMBOL
1A0
2
1A1
4
1A2
6
1A3
8
1OE
1
2A0
11
2A1
13
2A2
15
2A3
17
2OE
19
FUNCTION TABLE
INPUTS OUTPUTS
nOE nAx nYx
L L H
L H L
H X Z
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “Off” state
1Y
1Y
1Y
1Y
2Y0
2Y
2Y
2Y
LOGIC SYMBOL (IEEE/IEC)
0
18
1
16
2
14
3
12
9
1
7
2
5
3
3
SV00007
1
EN
2
4
6
8
19
EN
11
13
15
17
18
16
14
12
9
7
5
3
SV00008
ABSOLUTE MAXIMUM RA TINGS
SYMBOL
V
CC
V
I
V
OUT
DC supply voltage –0.5 to +4.6 V
DC input voltage
DC output voltage
PARAMETER CONDITIONS RATING UNIT
3
3
1, 2
–0.5 to +7.0 V
Output in Off or High state –0.5 to +7.0 V
Output in Low state 128
OUT
I
IK
I
OK
T
stg
p
Output in High state –64
DC input diode current VI < 0 –50 mA
DC output diode current VO < 0 –50 mA
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
1998 Feb 19
3
Page 4
Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
I
mA
IIIn ut leakage current
4
µA
Data ins
4
B
A
in uts
74LVT2403.3V Octal inverting buffer (3-State)
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
V
CC
V
V
V
I
OH
OL
∆t/∆v Input transition rise or fall rate; outputs enabled 10 ns/V
T
amb
DC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER TEST CONDITIONS T
V
IK
V
OH
V
OL
I
OFF
I
HOLD
I
EX
I
PU/PD
I
OZH
I
OZL
I
CCH
I
CCL
I
CCZ
∆I
CC
NOTES:
1. All typical values are at T
2. This is the increase in supply current for each input at V
3. This parameter is valid for any V
transition time of 100µsec is permitted. This parameter is valid for T
4. Unused pins at V
5. I
CCZ
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
DC supply voltage 2.7 3.6 V
Input voltage 0 5.5 V
I
High-level input voltage 2.0 V
IH
Low-level Input voltage 0.8 V
IL
High-level output current –32 mA
Low-level output current 32
Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64
Operating free-air temperature range –40 +85 °C
LIMITS
= -40°C to +85°C UNIT
amb
MIN TYP
1
Input clamp voltage VCC = 2.7V; II = –18mA 0.9 –1.2 V
VCC = 2.7 to 3.6V; IOH = –100µA VCC-0.2 VCC-0.1 V
High-level output voltage VCC = 2.7V; IOH = –8mA 2.4 2.5 V
VCC = 3V; IOH = –32mA 2 2.2 V
VCC = 2.7V; IOL = 100µA 0.1 0.2
VCC = 2.7V; IOL = 24mA 0.3 0.5
Low-level output voltage VCC = 3V; IOL = 16mA 0.25 0.4 V
VCC = 3V; IOL = 32mA 0.3 0.5
VCC = 3V; IOL = 64mA 0.4 0.55
VCC = 0 or 3.6V; VI = 5.5V 1 10
p
VCC = 3.6V; VI = VCC or GND Control pins ±0.1 ±1
VCC = 3.6V; VI = V
VCC = 3.6V; VI = 0
CC
p
0.1 1
–1 -5
Output off current VCC = 0V; VI or VO = 0 to 4.5V 1 ±100 µA
VCC = 3V; VI = 0.8V 75 150
us Hold current
NO TAG
p
VCC = 3V; VI = 2.0V –75 –150
VCC = 0V to 3.6V; VCC = 3.6V ±500
Current into an output in the
High state when VO > V
Power up/down 3-State
output current
3
VO = 5.5V; VCC = 3.0V 60 125 µA
CC
VCC = ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC;
OE/OE = Don’t care
±1 ±100 µA
3-State output High current VCC = 3.6V; VO = 3.0V 1 5 µA
3-State output Low current VCC = 3.6V; VO = 0.5V –1 –5 µA
VCC = 3.6V; Outputs High, VI = GND or V
Quiescent supply current VCC = 3.6V; Outputs Low, VI = GND or V
VCC = 3.6V; Outputs Disabled; VI = GND or V
NO TAG
0
Additional supply current
per input pin
is measured with outputs pulled to VCC or GND.
or GND
CC
2
amb
= 25°C.
CC
VCC = 3.0 to 3.6V; One input at V
Other inputs at VCC or GND
–0.6V .
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
CC
= 25°C, only.
amb
-0.6V;
I
0 0.12 0.19
CC,
O =
I
0 3 12 mA
CC,
O =
I
CC,
O =
0.12 0.19
0.1 0.2 mA
= 1.2V to VCC = 3.3V ± 10% a
CC
MAX
µA
1998 Feb 19
4
Page 5
Philips Semiconductors Product specification
74LVT2403.3V Octal inverting buffer (3-State)
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω;T
SYMBOL PARAMETER WAVEFORM
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
nAx to nY
x
Output enable time
to High and Low level
Output disable time
from High and Low level
NOTE:
1. All typical values are at V
= 3.3V and T
CC
amb
= –40°C to +85°C.
amb
= 25°C.
LIMITS
T
= –40°C to +85°C
amb
VCC = +3.3V ±0.3V
2.5
2.5
3.7
3.1
3.4
3.2
1
MAX MAX
4.3
4.3
5.2
5.2
5.6
5.1
MIN TYP
1
2
2
1
1
1
1
2
1.6
VCC = 2.7V UNIT
5.2
5.0
6.3
6.7
6.3
5.6
ns
ns
ns
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
V
IN
nAx INPUT
nYx OUTPUT
V
M
t
PHL
V
M
Waveform 1. Input (nAx) to Output (nYx) Propagation Delays
V
M
t
PLH
V
M
SA00037
nOE INPUT
nYx OUTPUT
nYx OUTPUT
V
MI
t
PZL
V
MO
t
PZH
V
MO
V
MI
t
PLZ
t
PHZ
Waveform 2. 3-State Output Enable and Disable Times
V
IN
0V
3.0V
VOL + 0.3V
V
OL
V
OH
– 0.3V
V
OH
0V
SV00104
1998 Feb 19
5
Page 6
Philips Semiconductors Product specification
74LVT2403.3V Octal inverting buffer (3-State)
TEST CIRCUIT AND WAVEFORMS
V
CC
PULSE
GENERATOR
V
IN
D.U.T.
R
T
V
OUT
R
L
C
L
R
L
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
= Load capacitance includes jig and probe capacitance;
C
L
see AC CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
Open
6V
GND
OUT
of
6.0V
GND
Open
NEGATIVE
PULSE
POSITIVE
PULSE
FAMILY
74LVT
t
90%
10%
V
M
10% 10%
t
THL
t
TLH
90% 90%
V
M
W
(tF)
(tR)t
t
W
90%
V
M
V
M
10%
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate t
t
W
2.7V 10MHz 500ns 2.5ns 2.5ns
AMP (V)
0V
t
(tR)
TLH
(tF)
THL
AMP (V)
0V
t
R
F
SV00092
1998 Feb 19
6
Page 7
Philips Semiconductors Product specification
74LVT2403.3V Octal inverting buffer (3-State)
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
1998 Feb 19
7
Page 8
Philips Semiconductors Product specification
74LVT2403.3V Octal inverting buffer (3-State)
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
1998 Feb 19
8
Page 9
Philips Semiconductors Product specification
74LVT2403.3V Octal inverting buffer (3-State)
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
1998 Feb 19
9
Page 10
Philips Semiconductors Product specification
74LVT240
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96
Document order number: 9397-750-03806
yyyy mmm dd
10
Loading...