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INTEGRATED CIRCUITS
74LVT125
3.3V Quad buffer (3-State)
Product specification
Supersedes data of 1995 Nov 14
IC23 Data Handbook
1998 Feb 19
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Philips Semiconductors Product specification
74L VT1253.3V Quad buffer (3-State)
FEA TURES
•Quad bus interface
•3-State buffers
•Output capability: +64mA/-32mA
•TTL input and output switching levels
•Input and output interface capability to systems at 5V supply
•Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
•Live insertion/extraction permitted
•No bus current loading when output is tied to 5V bus
•Power-up 3-State
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL PARAMETER
C
t
PLH
t
PHL
C
OUT
I
CCZ
IN
Propagation delay
An to Yn
Input capacitance VI = 0V or 3.0V 4 pF
Output capacitance Outputs disabled; VO = 0V or 3.0V 8 pF
Total supply current
DESCRIPTION
The LVT125 is a high-performance BiCMOS product designed for
V
operation at 3.3V .
CC
This device combines low static and dynamic power dissipation with
high speed and high output drive.
The 74LVT125 device is a quad buffer that is ideal for driving bus
lines. The device features four Output Enables (OE
OE
3), each controlling one of the 3-State outputs.
CONDITIONS
T
= 25°C; GND = 0V
amb
CL = 50pF; VCC = 3.3V
Outputs disabled;
V
= 3.6V
CC
0, OE1, OE2,
TYPICAL UNIT
2.7
2.9
ns
0.13 mA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
14-Pin Plastic SO –40°C to +85°C 74LVT125 D 74LVT125 D SOT108-1
14-Pin Plastic SSOP –40°C to +85°C 74LVT125 DB 74LVT125 DB SOT337-1
14-Pin Plastic TSSOP –40°C to +85°C 74LVT125 PW 74LVT125PW DH SOT402-1
PIN CONFIGURATION
1
OE0
2
A0
3
Y0
4
OE1
5
A1
6
Y1
7
GND Y2
14
13
12
11
10
9
8
SV00001
V
OE
A3
Y3
OE
A2
CC
3
2
LOGIC SYMBOL
1
0
OE
2
A0
4
OE1
5
A1
10
OE
2
9
A2
13
OE3
12
A3
3
Y0
6
Y1
8
Y2
11
Y3
SV00002
1998 Feb 19 853–1743 18991
2
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Philips Semiconductors Product specification
I
DC output current
74LVT1253.3V Quad buffer (3-State)
LOGIC SYMBOL (IEEE/IEC)
1
EN
2
4
5
10
9
13
12
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 5, 9, 12 A0 – A3 Data inputs
3, 6, 8, 11 Y0 – Y3 Data outputs
1, 4, 10, 13 OE0 – OE3 Output enables
7 GND Ground (0V)
14 V
FUNCTION T ABLE (EACH BUFFER)
INPUTS OUTPUTS
1
3
6
H = High voltage level
8
L = Low voltage level
X = Don’t care
Z = High impedance “Off” state
11
SV00003
CC
OEn An Yn
L L L
L H H
H X Z
Positive supply voltage
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
V
I
V
OUT
OUT
I
IK
I
OK
T
stg
DC supply voltage –0.5 to +4.6 V
DC input voltage
DC output voltage
p
DC input diode current VI < 0 –50 mA
DC output diode current VO < 0 –50 mA
Storage temperature range –65 to 150 °C
PARAMETER CONDITIONS RATING UNIT
3
3
1, 2
–0.5 to +7.0 V
Output in Off or High state –0.5 to +7.0 V
Output in Low state 128 mA
Out in High State –64 mA
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
1998 Feb 19
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Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
I
mA
IIIn ut leakage current
4
µA
Data ins
4
6
74LVT1253.3V Quad buffer (3-State)
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
V
CC
V
V
V
I
OH
OL
∆t/∆v Input transition rise or fall rate; outputs enabled 10 ns/V
T
amb
DC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
V
IK
V
OH
V
OL
I
OFF
I
HOLD
I
EX
I
PU/PD
I
OZH
I
OZL
I
CCH
I
CCL
I
CCZ
∆I
CC
NOTES:
1. All typical values are at V
2. This is the increase in supply current for each input at the specified voltage level other than V
3. This parameter is valid for any V
transition time of 100µsec is permitted. This parameter is valid for T
4. Unused pins at V
5. I
CCZ
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
DC supply voltage 2.7 3.6 V
Input voltage 0 5.5 V
I
High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
High-level output current –32 mA
Low-level output current 32
Low-level output current; current duty cycle ≤ 50%, f ≥ 1kHz 64
Operating free-air temperature range –40 +85 °C
LIMITS
MIN TYP
1
Input clamp voltage VCC = 2.7V; IIK = –18mA –0.9 –1.2 V
VCC = 2.7 to 3.6V; IOH = –100µA VCC-0.2 VCC-0.1
High-level output voltage VCC = 2.7V; IOH = –8mA 2.4 2.5 V
VCC = 3.0V; IOH = –32mA 2.0 2.2
VCC = 2.7V; IOL = 100µA 0.1 0.2
VCC = 2.7V; IOL = 24mA 0.3 0.5
Low-level output voltage VCC = 3.0V; IOL = 16mA 0.25 0.4 V
VCC = 3.0V; IOL = 32mA 0.3 0.5
VCC = 3.0V; IOL = 64mA 0.4 0.55
VCC = 0 or 3.6V; VI = 5.5V All inputs 1 10
p
VCC = 3.6V; VI = VCC or GND Control pins ±0.1 ±1
VCC = 3.6V; VI = V
VCC = 3.6V; VI = 0
CC
p
0.1 1
–1 -5
Output off current VCC = 0V; VI or VO = 0 to 4.5V 1 ±100 µA
VCC = 3V; VI = 0.8V 75 150
Bus Hold current A inputs
VCC = 3V; VI = 2.0V –75 –150
VCC = 0V to 3.6V; VCC = 3.6V ±500
Current into an output in the
High state when V
Power up/down 3-State
output current
> V
O
3
VO = 5.5V; VCC = 3.0V 60 125 µA
CC
VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC;
OE/OE
= Don’t care
±1 ±100 µA
3-State output high current VCC = 3.6V; VO = 3.0V 1 5 µA
3-State output low current VCC = 3.6V; VO = 0.5V –1 –5 µA
VCC = 3.6V; Outputs High, VI = GND or V
Quiescent supply current VCC = 3.6V; Outputs Low, VI = GND or V
VCC = 3.6V; Outputs Disabled; VI = GND or V
Additional supply current per
2
input pin
= 3.3V and T
CC
CC
or GND.
is measured with outputs pulled to VCC or GND.
CC
VCC = 3V to 3.6V; One input at VCC-0.6V,
Other inputs at V
= 25°C.
amb
or GND
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
amb
= 25°C only.
I
0 0.13 0.19
CC,
O =
I
0 2 7 mA
CC,
O =
CC,
5
I
O =
0
0.13 0.19
0.1 0.2 mA
or GND
CC
= 1.2V to VCC = 3.3V ± 0.3V a
CC
MAX
µA
1998 Feb 19
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Philips Semiconductors Product specification
74LVT1253.3V Quad buffer (3-State)
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω, T
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V UNIT
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
An to Yn
Output enable time
OEn to Yn
Output disable time
OEn to Yn
NOTE:
1. All typical values are at V
= 3.3V and T
CC
amb
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
= –40°C to +85°C.
amb
= 25°C.
LIMITS
2.7
2.9
3.4
3.4
3.7
2.6
1
MAX MAX
4.0
3.9
4.7
4.7
5.1
4.5
4.5
4.9
6.0
6.5
5.7
4.0
ns
ns
ns
MIN TYP
1
2
2
1.0
1.0
1.0
1.1
1.8
1.3
3 V
INPUT
OUTPUT
1.5V
t
PLH
1.5V 1.5V
1.5V
t
0 V
PHL
V
V
SA00028
Waveform 1. Input (An) to Output (Yn) Propagation Delays
2.7V
OE INPUT
OH
Yn OUTPUT
OL
Yn OUTPUT
1.5V
t
PZL
t
PZH
1.5V
1.5V
1.5V
t
PLZ
t
PHZ
0V
3.0V
VOL + 0.3V
V
OL
V
OH
– 0.3V
V
OH
0V
SV00103
Waveform 2. 3-State Output Enable and Disable Times
1998 Feb 19
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Philips Semiconductors Product specification
74LVT1253.3V Quad buffer (3-State)
TEST CIRCUIT AND WAVEFORMS
V
CC
PULSE
GENERATOR
V
IN
D.U.T.
R
T
V
OUT
R
L
C
L
R
L
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
= Load capacitance includes jig and probe capacitance;
C
L
see AC CHARACTERISTICS for value.
= Termination resistance should be equal to Z
R
T
pulse generators.
Open
6V
GND
OUT
of
6.0V
GND
Open
NEGATIVE
PULSE
POSITIVE
PULSE
FAMILY
74LVT
t
90%
10%
V
M
10% 10%
t
THL
t
TLH
90% 90%
V
M
W
(tF)
(tR)t
t
W
90%
V
M
V
M
10%
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate t
t
W
2.7V 10MHz 500ns 2.5ns 2.5ns
AMP (V)
0V
(tR)
t
TLH
(tF)
THL
AMP (V)
0V
t
R
F
SV00092
1998 Feb 19
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Philips Semiconductors Product specification
74LVT1253.3V Quad buffer (3-State)
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
1998 Feb 19
7
Page 8
Philips Semiconductors Product specification
74LVT1253.3V Quad buffer (3-State)
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
1998 Feb 19
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Philips Semiconductors Product specification
74LVT1253.3V Quad buffer (3-State)
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
1998 Feb 19
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Philips Semiconductors Product specification
74LVT1253.3V Quad buffer (3-State)
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96
Document order number: 9397-750-03514
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