Page 1
INTEGRATED CIRCUITS
74LVT00
3.3V Quad 2-input NAND gate
Product specification 1996 Aug 15
IC24 Data Handbook
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Philips Semiconductors Product specification
74L VT003.3V Quad 2-input NAND gate
QUICK REFERENCE DATA
CONDITIONS
T
SYMBOL PARAMETER
t
PLH
t
PHL
C
I
CCL
IN
Propagation delay
An or Bn
to Yn
CL = 50pF;
VCC = 3.3V
Input capacitance VI = 0V or 3.0V 3 pF
Total supply current Outputs Low; VCC = 3.6V 1 mA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
14-Pin Plastic SO –40°C to +85°C 74LVT00 D 74LVT00 D SOT108-1
14-Pin Plastic SSOP –40°C to +85°C 74LVT00 DB 74LVT00 DB SOT337-1
14-Pin Plastic TSSOP –40°C to +85°C 74L VT00 PW 74LVT00PW DH SOT402-1
= 25°C;
amb
GND = 0V
TYPICAL UNIT
2.7
2.7
ns
LOGIC SYMBOL
12459101213
B1A0 B0 A1 A2 B2 A3 B3
Y0Y1Y2Y3
VCC = Pin 14
GND = Pin 7
36811
LOGIC SYMBOL (IEEE/IEC)
1
2
4
5
9
10
12
13
&
SA00334
PIN CONFIGURA TION
SA00333
14
V
CC
13
B3
12
A3
Y
11
3
B2
10
A2
9
Y2
87
GND
1
A0
2
B0
Y
3
0
4
A1
5
B1
1
6
Y
PIN DESCRIPTION
PIN
NUMBER
3
1, 2, 4, 5, 9,
10, 12, 13
3, 6, 8, 11 Yn Data outputs
6
7 GND Ground (0V)
14 V
8
11
SYMBOL NAME AND FUNCTION
An-Bn Data inputs
Positive supply voltage
CC
SF00004
1996 Aug 15 853-1858 17183
2
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Philips Semiconductors Product specification
I
DC output current
mA
SYMBOL
PARAMETER
UNIT
74LVT003.3V Quad 2-input NAND gate
LOGIC DIAGRAM
1
A0
2
B0
4
A1
5
B1
9
A2
10
B2
12
VCC = Pin 14
GND = Pin 7
A3
13
B3
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
OUT
T
stg
DC supply voltage –0.5 to +4.6 V
DC input diode current VI < 0 –50 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
p
Storage temperature range –65 to 150 °C
PARAMETER CONDITIONS RATING UNIT
3
3
3
6
8
11
SA00360
1, 2
0
Y
Y
1
Y2
Y
3
FUNCTION TABLE
INPUTS OUTPUT
Dna Dnb Qn
L L H
L H H
H L H
H H L
NOTES:
H = High voltage level
L = Low voltage level
–0.5 to +7.0 V
Output in Off or High state –0.5 to +7.0 V
Output in High state –32
Output in Low state 64
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
V
CC
V
V
V
I
OH
I
OL
∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V
T
amb
DC supply voltage 2.7 3.6 V
Input voltage 0 5.5 V
I
High-level input voltage 2.0 V
IH
Low-level Input voltage 0.8 V
IL
High-level output current –20 mA
Low-level output current 32 mA
Operating free-air temperature range –40 +85 °C
1996 Aug 15
3
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Philips Semiconductors Product specification
III
t
A
Quiescent supply current
mA
74LVT003.3V Quad 2-input NAND gate
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions
Voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP1MAX
V
IK
V
OH
V
OL
I
OFF
I
CCH
I
CCL
∆I
CC
C
I
NOTES:
1. All typical values are at V
2. This is the increase in supply current for each input at the specificed voltage level other than V
Input clamp voltage VCC = 2.7V; IIK = –18mA –1.2 V
VCC = 2.7 to 3.6V; IOH = –100µA VCC–0.2
High-level output voltage VCC = 2.7V; IOH = –6mA 2.4 V
VCC = 3.0V; IOH = –20mA 2.0
VCC = 2.7V; IOL = 100µA 0.2
Low-level output voltage VCC = 2.7V; IOL = 24mA 0.5 V
VCC = 3.0V; IOL = 32mA 0.5
nput leakage curren
VCC = 0 or 3.6V; VI = 5.5V 10
VCC = 3.6V; VI = VCC or GND ±1
µ
Output off current VCC = 0V; VI or VO = 0 to 4.5V ±100 µA
pp
Additional supply current per input pin
VCC = 3.6V; Outputs High, VI = GND or
CC,
I
O =
0
V
VCC = 3.6V; Outputs Low, VI = GND or V
I
0
O =
VCC = 3V to 3.6V; One input at VCC–0.6V,
2
Other inputs at VCC or GND
CC,
0.02
1 2
0.2 µA
Input capacitance VI = 3V or 0 3 pF
= 3.3V and T
CC
amb
= 25°C.
or GND.
CC
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; T
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ± 0.3V VCC = 2.7V UNIT
t
PLH
t
PHL
NOTE:
1. All typical values are at V
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
A
, B
n
Yn
Waveform 1. Propagation delay for inverting outputs
1996 Aug 15
Propagation delay
An or Bn to Yn
n
= 3.3V and T
CC
V
M
t
PHL
V
M
= –40°C to +85°C.
amb
LIMITS
2.7
2.7
1
MAX MAX
4.1
3.9
5.0
3.8
ns
MIN TYP
1
= 25°C.
amb
V
M
t
PLH
V
M
SF01395
1.0
1.0
4
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Philips Semiconductors Product specification
74LVT003.3V Quad 2-input NAND gate
TEST CIRCUIT AND WAVEFORMS
V
CC
PULSE
GENERATOR
V
IN
D.U.T.
R
T
V
OUT
C
L
R
L
Test Circuit for Outputs
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
= Load capacitance includes jig and probe capacitance;
C
L
see AC CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
90%
NEGATIVE
PULSE
POSITIVE
PULSE
10%
t
W
V
M
10% 10%
t
(tF)
THL
t
(tR)t
TLH
90% 90%
V
M
t
W
V
M
V
M
90%
10%
t
TLH
THL
AMP (V)
0V
(tR)
(tF)
AMP (V)
0V
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t
t
W
t
R
74LVT 2.7V ≤10MHz 500ns ≤2.5ns ≤2.5ns
SV00022
F
1996 Aug 15
5
Page 6
Philips Semiconductors Product specification
74LVT003.3V Quad 2-input NAND gate
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
1996 Aug 15
6
Page 7
Philips Semiconductors Product specification
74LVT003.3V Quad 2-input NAND gate
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
1996 Aug 15
7
Page 8
Philips Semiconductors Product specification
74LVT003.3V Quad 2-input NAND gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
1996 Aug 15
8
Page 9
Philips Semiconductors Product specification
74LVT003.3V Quad 2-input NAND gate
NOTES
1996 Aug 15
9
Page 10
Philips Semiconductors Product specification
74LVT003.3V Quad 2-input NAND gate
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1996
All rights reserved. Printed in U.S.A.
(print code) Date of release: July 1994
Document order number: 9397-750-04847
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