Datasheet 74LVCH322244A, 74LVC322244A Datasheet (Philips)

DATA SH EET

Product specification
File under Integrated Circuits, IC24

1999 Aug 31

INTEGRATED CIRCUITS

74LVC322244A; 74LVCH322244A

32-bit buffer/line driver; with 30 Ω
series termination resistors; 5 V
input/output tolerant; 3-state

1999 Aug 31 2

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

FEATURES

• 5 V tolerant inputs/outputs for interfacing with 5 V logic

• Wide supply voltage range of 1.2 to 3.6 V

• CMOS low power consumption

• MULTIBYTE flow-trough standardpin-out architecture

• Low inductance multiple power and ground pins for

minimum noise and ground bounce

• Direct interface with TTL levels

• Bus hold on data inputs (74LVCH322244A only)

• Integrated 30 Ω termination resistors

• Typical output ground bounce voltage:

V

OLP

<0.8 V at VCC= 3.3 V; T

amb

=25°C

• Typical output VOH undershoot voltage:
V

OHV

>2VatVCC= 3.3 V; T

amb

=25°C

• Power-off disabled outputs, permitting live insertion

• Plastic fine-pitch ball grid array package.

DESCRIPTION

The74LVC(H)322244Aisahigh-performance,low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 V. These features allow the use of
these devices in a mixed 3.3 and 5 V environment.

The74LVC(H)322244Ais a 32-bit non-inverting buffer/line
driver with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs 1OE and 2OE.
A HIGH on input nOE causes the outputs to assume a
high-impedance OFF-state.

The 74LVC(H)322244A is designed with 30 Ω series
terminationresistors in bothHIGH and LOW outputstages
to reduce line noise.

To ensure the high-impedance state during power-up or
power-down, input nOE should be tied to VCC through a
pull-up resistor; the minimum value of the resistor is
determined by the current-sinking capability of the driver.

The 74LVCH322244A bus hold data input circuit
eliminates the need for external pull-up resistors to hold
unused or floating data inputs at a valid logic level (see
Fig.3).

QUICK REFERENCE DATA

Ground = 0 V; T

amb

=25°C; tr=tf≤2.5 ns.

Note

1. C

PD

is used to determine the dynamic power dissipation (PDin µW).

PD=CPD× V

CC

2

× fi+ Σ(CL× V

CC

2

× fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
C

L

= output load capacitance in pF;
VCC= supply voltage in Volts;
Σ(CL× V

CC

2

× fo) = sum of the outputs.

SYMBOL PARAMETER CONDITIONS TYPICAL UNIT

t

PHL/tPLH

propagation delay nAnto nY

n

CL= 50 pF; VCC= 3.3 V 2.9 ns

C

I

input capacitance 5.0 pF

C

PD

power dissipation capacitance per
buffer

VI= GND to VCC; note 1 25 pF

1999 Aug 31 3

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

FUNCTION TABLE

See note 1.

Note

1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.

ORDERING INFORMATION

PINNING

INPUT OUTPUT

n

OE nA

n

nY

n

LLL
LHH

HXZ

TYPE NUMBER

PACKAGES

TEMPERATURE

RANGE

PINS PACKAGE MATERIAL CODE

74LVC322244AEC −40 to +85 °C 96 LFBGA96 plastic SOT536-1
74LVCH322244AEC 96 LFBGA96 plastic SOT536-1

SYMBOL DESCRIPTION

nA

n

data inputs

nY

n

data outputs

GND ground (0 V)

nOE 3-state output enable inputs (active LOW)

V

CC

DC supply voltage

1999 Aug 31 4

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

handbook, full pagewidth

MNA471

1A11A32A12A33A13A34A14A25A15A36A16A37A17A38A18A

2

1A01A22A02A23A03A24A04A35A05A26A06A27A07A28A08A

3

1Y01Y22Y02Y23Y03Y24Y04Y35Y05Y26Y06Y27Y07Y28Y08Y

3

1Y11Y32Y12Y33Y13Y34Y14Y25Y15Y36Y16Y37Y17Y38Y18Y

2

2OE 3OE 6OEGND GND GND GND 7OEV

CC

V

CC

GND GND GND GNDV

CC

V

CC

1OE

6

5

2

1

4

3 4OE 5OEGND GND GND GND 8OEV

CC

V

CC

GND GND GND GNDV

CC

V

CC

AHJBDEG TCF KMNRLP

Fig.1 Pin configuration.

Fig.2 Logic symbol.

handbook, full pagewidth

A3

B6

B5

A6

A5

1A

3

1A

2

1A

1

1A

0

A2

A1

B2

B1

1Y

0

1Y

1

1Y

2

1Y

3

1OE

H4

F6

F5

E6

E5

3A

3

3A

2

3A

1

3A

0

E2

E1

F2

F1

3Y

0

3Y

1

3Y

2

3Y

3

3OE

J3

K6

K5

J6

J5

5A

3

5A

2

5A

1

5A

0

J2

J1

K2

K1

5Y

0

5Y

1

5Y

2

5Y

3

5OE

T4

P6

P5

N6

N5

7A

3

7A

2

7A

1

7A

0

N2

N1

P2

P1

7Y

0

7Y

1

7Y

2

7Y

3

7OE

A4

D6

D5

C6

C5

2A

3

2A

2

2A

1

2A

0

C2

C1

D2

D1

2Y

0

2Y

1

2Y

2

2Y

3

2OE

H3

H5

H6

G6

G5

4A

3

4A

2

4A

1

4A

0

G2

G1

H1

H2

4Y

0

4Y

1

4Y

2

4Y

3

4OE

J4

M6

M5

L6

L5

6A

3

6A

2

6A

1

6A

0

L2

L1

M2

M1

6Y

0

6Y

1

6Y

2

6Y

3

6OE

MNA472

T3

T5

T6

R6

R5

8A

3

8A

2

8A

1

8A

0

R2

R1

T1

T2

8Y

0

8Y

1

8Y

2

8Y

3

8OE

1999 Aug 31 5

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

Fig.3 Bus hold circuit.

handbook, halfpage

MNA473

V

CC

data

input

to internal circuit

1999 Aug 31 6

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

RECOMMENDED OPERATING CONDITIONS

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground= 0 V).

Notes

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. Above 70 °C the value of P

D

derates linearly with 1.8 mW/K.

SYMBOL PARAMETER CONDITIONS

LIMITS

UNIT

MIN. MAX.

V

CC

DC supply voltage for max. speed performance 2.7 3.6 V

for low-voltage applications 1.2 3.6 V

V

I

DC input voltage 0 5.5 V

V

O

DC output voltage output HIGH or LOW state 0 V

CC

V

3-state 0 5.5 V

T

amb

operating ambient temperature see DC and AC characteristics

per device

−40 +85 °C

t

r,tf

(∆t/∆f) input rise and fall times ratio VCC= 1.2 to 2.7 V 0 20 ns/V

V

CC

= 2.7 to 3.6 V 0 10

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

DC supply voltage −0.5 +6.5 V

V

I

DC input voltage note 1 −0.5 +6.5 V

I

IK

DC input diode current VI<0 −−50 mA

I

OK

DC output diode current VO>VCCor VO< 0; note 1 −±50 mA

V

O

DC output voltage output HIGH or LOW state;

note 1

−0.5 VCC+ 0.5 V

output 3-state; note 1 −0.5 +6.5 V

I

O

DC output source or sink current VO=0toV

CC

−±50 mA

I

CC

, I

GND

DC VCC or GND current −±100 mA

T

stg

storage temperature −65 +150 °C

P

D

power dissipation per packages temperature range:

−40 to +85 °C; note 2

− 1000 mW

1999 Aug 31 7

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

DC CHARACTERISTICS

Over recommended operating conditions; voltage are referenced to GND (ground=0V).

Notes

1. All typical values are at V

CC

= 3.3 V and T

amb

=25°C.

2. For bus hold parts the bus hold circuit is switched off when VIexceeds VCC allowing 5.5 V on the input terminal.

3. Valid for data inputs of bus hold parts only (LVCH32xxx-A).

4. For data inputs only. Control inputs do not have a bus hold circuit.

5. The specified sustaining current at the data input holds the input below the specified VIlevel.

6. The specified overdrive current at the data input forces the data input to the opposite logic input level.

SYMBOL PARAMETER

TEST CONDITIONS T

amb

(°C)

UNIT

OTHER VCC(V)

−40 to +85

MIN. TYP.

(1)

MAX.

V

IH

HIGH-level input voltage 1.2 V

CC

−−V

2.7 to 3.6 2.0 −−

V

IL

LOW-level input voltage 1.2 −−GND V

2.7 to 3.6 −−0.8

V

OH

HIGH-level output voltage VI=VIHor V

IL

IO= −6 mA 2.7 VCC− 0.5 −−V
I

O

=−100 µA 3.0 VCC− 0.2 V

CC

−

I

O

= −12 mA 3.0 VCC− 0.8 −−

V

OL

LOW-level output voltage VI=VIHor V

IL

IO= 6 mA 2.7 −−0.40 V
I

O

= 100 µA 3.0 −−0.20

I

O

= 12 mA 3.0 −−0.55

I

I

input leakage current VI= 5.5 Vor GND;

note 2

3.6 −±0.1 ±5 µA

I

OZ

3-state output OFF-state current VI=VIHor VIL;

VO= 5.5 Vor GND

3.6 − 0.1 ±5 µA

I

off

power-off leakage supply current VIor VO= 5.5 V 0.0 − 0.1 ±10 µA

I

CC

quiescent supply current VI=VCCor GND; IO= 0 3.6 − 0.1 40 µA

∆I

CC

additional quiescent supply
current

VI=VCC− 0.6 V; IO=0;
per control pin

2.7 to 3.6 − 5 500 µA

V

I=VCC

− 0.6 V; IO=0;

per data input pin

2.7 to 3.6 − 5 500 µA

I

BHL

bus hold LOW sustaining current VI= 0.8 V;

notes 3, 4 and 5

3.0 75 −−µA

I

BHH

bus hold HIGH sustaining current VI= 2.0 V;

notes 3, 4 and 5

3.0 −75 −−µA

I

BHLO

bus hold LOW overdrive current notes 3, 4 and 6 3.6 450 −−µA

I

BHHO

bus hold HIGH overdrive current notes 3, 4 and 6 3.6 −450 −−µA

1999 Aug 31 8

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

AC CHARACTERISTICS

Ground = 0 V; tr=tf≤2.5 ns; CL= 50 pF; RL= 500 Ω.

Note

1. All typical values are measured at V

CC

= 3.3 V and T

amb

=25°C.

AC WAVEFORMS

SYMBOL PARAMETER

TEST CONDITIONS T

amb

= −40 to +85 °C

UNIT

WAVEFORMS VCC(V) MIN. TYP.

(1)

MAX.

t

PHL/tPLH

propagation delay
nAnto nY

n

see Figs 4 and 6 2.7 1.5 − 7.3 ns

3.0 to 3.6 1.5 2.9 6.3

t

PZH/tPZL

3-state output enable time
nOE to nY

n

see Figs 5 and 6 2.7 1.5 − 8.1 ns

3.0 to 3.6 1.5 3.4 7.1

t

PHZ/tPLZ

3-state output disable time
nOE to nY

n

see Figs 5 and 6 2.7 1.5 − 6.0 ns

3.0 to 3.6 1.5 2.8 5.0

Fig.4 Input nAnto output nYn propagation delay times.

VM= 1.5 V at VCC≥ 2.7 V or
VM= 0.5 × VCCat VCC< 2.7 V.
VOL and VOH are typical output voltage drop that occur with the output load.

handbook, halfpage

MNA474

nA

n

INPUT

nY

n

OUTPUT

t

PHL

t

PLH

GND

V

I

V

M

V

M

V

OH

V

OL

1999 Aug 31 9

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

Fig.5 3-state enable and disable times.

VM= 1.5 V at VCC≥ 2.7 V or
VM= 0.5 × VCCat VCC< 2.7 V;
VX=VOL+ 0.3 V at VCC≥ 2.7 V or
VX=VOL+ 0.1 V at VCC< 2.7 V;
VY=VOH− 0.3VatVCC≥ 2.7 V or
VY=VOH− 0.1VatVCC< 2.7 V.
VOL and VOH are typical output voltage drop that occur with the output load.

handbook, full pagewidth

MNA478

t

PLZ

t

PHZ

outputs

disabled

outputs
enabled

V

Y

V

X

outputs

enabled

OUTPUT
LOW-to-OFF
OFF-to-LOW

OUTPUT
HIGH-to-OFF
OFF-to-HIGH

nOE INPUT

V

I

V

OL

V

OH

V

CC

V

M

GND

GND

t

PZL

t

PZH

V

M

V

M

Fig.6 Load circuitry for switching times.

Definitions for test circuit:
RL= load resistor.
CL= load capacitance including jig and probe capacitance.
RT= termination resistance should be equal tothe outputimpedance

Z

o

of the pulse generator.

TEST S

1

t

PLH/tPHL

open

t

PLZ/tPZL

2 × V

CC

t

PHZ/tPZH

GND

V

CC

V

I

< 2.7 V V

CC

2.7 to 3.6 V 2.7 V

handbook, full pagewidth

open
GND

50 pF

2 × V

CC

V

CC

V

I

V

O

MNA479

D.U.T.

C

L

R

L

R

T

500 Ω

R

L

500 Ω

PULSE

GENERATOR

S

1

1999 Aug 31 10

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

PACKAGE OUTLINE

ball A1
index area

0.8

A

1bA2

UNIT

D

ye

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

98-11-25
99-06-03

IEC JEDEC EIAJ

mm

1.5

0.41

0.31

1.2

0.9

5.6

5.4

Z

D

0.93

0.58

Z

E

0.93

0.58

13.6

13.4

0.51

0.41

0.1

DIMENSIONS (mm are the original dimensions)

SOT536-1

E

0.2v0.15

w

0 5 10 mm

scale

SOT536-1

LFBGA96: plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm

A

max.

A

A

2

A

1

detail X

y

vA

e

e

∅ w

b

X

D

E

A

M

A

B

C

D

E

F

H

G

J

K

L

M

P
N

R

T

246135

Z

E

Z

D

1999 Aug 31 11

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

SOLDERING
Introduction to soldering surface mount packages

Thistextgives a very brief insight toacomplextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board byscreenprinting, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating,soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswith leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement andbefore soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 Aug 31 12

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PACKAGE

SOLDERING METHOD

WAVE REFLOW

(1)

BGA, LFBGA, SQFP, TFBGA not suitable suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ suitable suitable

LQFP, QFP, TQFP not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO not recommended

(5)

suitable

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

1999 Aug 31 13

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

NOTES

1999 Aug 31 14

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

NOTES

1999 Aug 31 15

Philips Semiconductors Product specification

32-bit buffer/line driver; with 30 Ω series termination
resistors; 5 V input/output tolerant; 3-state

74LVC322244A;

74LVCH322244A

NOTES

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

1999

67

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Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips Development Corporation, SemiconductorsDivision,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),
Tel. [phone], Fax [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. [phone], Fax. [phone]

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

Printed in The Netherlands 245004/01/pp16 Date of release: 1999 Aug 31 Document order number: 9397750 06261