Page 1
INTEGRATED CIRCUITS
74LVC652
Octal transceiver/register with dual
enable (3-State)
Product specification
Supercedes data of 1993 Dec 01
IC24 Data Handbook
1998 Jul 29
Page 2
Philips Semiconductors Product specification
Octal transceiver/register with dual enable (3-State)
*FEA TURES
•Wide supply voltage range of 1.2V to 3.6V
•In accordance with JEDEC standard no. 8-1A
•CMOS low power consumption
•Direct interface with TTL levels
•5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic
DESCRIPTION
The 74LVC652 is a high performance, low-power, low-voltage
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State
operation, outputs can handle 5V. This feature allows the use of
these devices as translators in a mixed 3.3V/5V environment.
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PHL/tPLH
f
max
C
I
C
PD
NOTES:
1. C
is used to determine the dynamic power dissipation (PD in µW)
PD
= CPD V
P
D
f
= input frequency in MHz; CL = output load capacitance in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
Σ (C
L
2. The condition is V
= 25°C; tr = tf 2.5 ns
amb
2
x fi Σ (CL V
CC
2
V
fo) = sum of the outputs.
CC
= GND to V
I
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay
An to Bn; Bn to A
Maximum clock frequency 150 MHz
Input capacitance 5.0 pF
Power dissipation capacitance per latch Notes 1, 2 45 pF
CC.
n
2
fo) where:
CC
The 74LVC652 consist of 8 non-inverting bus transceiver circuits
with 3-State outputs, D-type flip-flops and control circuitry arranged
for multiplexed transmission of data directly from the internal
registers. Data on the ‘A’ or ‘B’ or both buses, will be stored in the
internal registers, at the appropriate clock inputs (CPAB or CPBA)
regardless of the select inputs (SAB and SBA) or output enable
(OEAB and OE
SAB and SBA data can directly go from input to output (real time
mode) or data can be controlled by the clock (storage mode), this is
when the OEn inputs this operating mode permits. The output
enable inputs OEAB and OEBA determine the operation mode of
the transceiver.
When OEAB is LOW, no data transmission from An to Bn is possible
and when OE
An possible. When SAB and SBA are in the real time transfer mode,
it is also possible to store data without using the internal D-type
flip-flops by simultaneously enabling OEAB and OE
configuration each output reinforces its input.
CL = 50pF
VCC = 3.3V 5.0
BA) control inputs. Depending on the select inputs
BA is HIGH, there is no data transmission from Bn to
74L VC652
BA. In this
ns
ORDERING AND PACKAGE INFORMA TION
PACKAGES TEMPERATURE RANGE
24-Pin Plastic SO –40°C to +85°C 74LVC652 D 74LVC652 D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74LVC652 DB 74LVC652 DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC652 PW 4LVC652PW DH SOT355-1
1998 Jul 29 853-2104 19803
OUTSIDE NORTH
AMERICA
2
NORTH AMERICA PKG. DWG. #
Page 3
Philips Semiconductors Product specification
FUNCTION
74LVC652Octal transceiver/register with dual enable (3-State)
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
1 CP
CP
OE
S
GND
AB
AB
AB
1
2
3
A
4
0
5
A
1
A
6
2
A
7
3
A
8
4
9
A
5
10
A
6
A
11
7
12
V
24
CP
23
S
22
OE
21
B
20
19
B
B
18
B
17
B
16
B
15
B
14
B
13
SV00767
CC
BA
0
1
2
3
4
5
6
7
BA
BA
2 S
3 OE
4, 5, 6, 7, 8,
9, 10, 11
12 GND Ground (0V)
20, 19, 18, 17,
16, 15, 14, 13
21 OE
22 S
23 CP
24 V
FUNCTION TABLE
INPUTS DATA I/O *
OE
* The data output functions may be enabled or disabled by
various signals at the OE
functions are always enabled, i.e., data at the bus inputs will
be stored on every LOW-to-HIGH transition on the clock
inputs.
un = unspecified
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
↑ = LOW–to–HIGH level transition
OE
AB
L
L
X
H
L
L
L
L
H
H
BA
H
H
H
H
X
L
L
L
H
H
CP
AB
CP
BA
H or L↑H or L
↑
↑
H or L
↑
H or L
↑
X
X
X
H or L
↑
↑
↑
X
H or L
X
X
S
AB
X
X
X
L
X
X
X
X
L
H
S
BA
X
X
X
X
X
L
L
H
X
X
A0 to A
7
input input
input
input
un *
output
output input
input output
H L H or L H or L H H output output
and OEBA inputs. Data input
AB
B0 to B
un *
output
input
input
7
AB
AB
AB
A0 to A
B0 to B
BA
BA
BA
CC
‘A’ to ‘B’ clock input
(LOW-to-HIGH, edge-triggered)
Select ‘A’ to ‘B’ source input
Output enable B to A input
(active LOW)
‘A’ data inputs/outputs
7
‘B’ data inputs/outputs
7
Output enable A to B input
Select ‘B’ to ‘A’ source input
‘B’ to ‘A’ clock input
(LOW-to-HIGH, edge-triggered)
Positive supply voltage
isolation
store A and B data
store A, hold B,
store A in both registers
hold A, store B,
store B in both registers
real-time B data to A bus
stored B data to A bus
real-time A data to B bus
stored A data to B bus
stored A data to B bus and
stored B data to A bus
1998 Jul 29
3
Page 4
Philips Semiconductors Product specification
74LVC652Octal transceiver/register with dual enable (3-State)
LOGIC SYMBOL
1
2
4
5
6
7
8
9
10
11
AB
S
AB
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
OE
OE
CP
LOGIC SYMBOL (IEEE/IEC)
23
1
22
2
21
3
C4
C5
G6
G7
3EN1
3EN2
BA
AB
FUNCTIONAL DIAGRAM
21
CP
S
3
BA
BA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
SV00768
23
22
20
19
18
17
16
15
14
13
4
A
0
A
5
1
A
6
2
A
7
3
A
8
4
A
9
5
A
10
6
A
11
7
21
OE
BA
3
OE
AB
2
S
AB
22
S
BA
1
CP
AB
23
CP
BA
B
B
B
B
B
B
B
B
0
1
2
3
4
5
6
7
20
19
18
17
16
15
14
13
SV00770
4
5
6
7
8
9
10
11
1998 Jul 29
1
6
1
6
5D
1
4D
1
1
7
2
7
20
19
18
17
16
15
14
13
SV00769
4
Page 5
Philips Semiconductors Product specification
74LVC652Octal transceiver/register with dual enable (3-State)
LOGIC DIAGRAM
OE
BA
OE
AB
S
BA
CP
BA
S
AB
CP
AB
V
CC
S
D
Y
1
A
n
S
D
Y
1
MUX
D
Q
D
FF
CP
8 identical channels
2
n
MUX
D
2
D
Q
FF
n
CP
V
CC
B
n
SV00771
1998 Jul 29
5
Page 6
Philips Semiconductors Product specification
SYMBOL
PARAMETER
CONDITIONS
UNIT
V
V
V
P
TOT
74LVC652Octal transceiver/register with dual enable (3-State)
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
DC supply voltage (for max. speed performance) 2.7 3.6
CC
DC supply voltage (for low-voltage applications) 1.2 3.6
T
V
V
V
amb
tr, t
DC input voltage range 0 5.5 V
I
DC input voltage range for I/Os 0 V
I/O
DC output voltage range 0 V
O
Operating free-air temperature range –40 +85 °C
Input rise and fall times
f
VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V
0
0
20
10
CC
CC
V
V
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
I
IK
V
I
I
OK
I/O
I
O
I
, I
GND
CC
T
stg
DC supply voltage –0.5 to +4.6 V
DC input diode current VI t0 –50 mA
DC input voltage Note 2 –0.5 to +5.5 V
DC output diode current V
DC output voltage;
output HIGH or LOW
DC input voltage;
output 3-State
DC output diode current VO = 0 to V
DC VCC or GND current
Storage temperature range –65 to +150 °C
PARAMETER CONDITIONS RATING UNIT
uVCC or VO t 0
O
"50
mA
Note 2 –0.5 to VCC +0.5 V
Note 2 –0.5 to VCC +0.5 V
CC
"50
"100
mA
mA
Power dissipation per package
– plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500
– plastic shrink mini-pack (SSOP and
TSSOP)
above +60°C derate linearly with 5.5 mW/K 500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jul 29
6
Page 7
Philips Semiconductors Product specification
VIHHIGH level Input voltage
V
VILLOW level Input voltage
V
VOHHIGH level output voltage
V
74LVC652Octal transceiver/register with dual enable (3-State)
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP1MAX
V
I
IHZ/IILZ
I
I
OFF
I
∆I
LOW level output voltage
OL
I
Input leakage current VCC = 3.6V; VI = 5.5V or GND Not for I/O pins
I
Input current for common I/O pins VCC = 3.6V; VI = 5.5V or GND
3-State output OFF-state current VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND 0.1
OZ
Power off leakage current VCC = 0.0V; VI = 5.5V; VO = 5.5V 0.1
Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 10 µA
CC
Additional quiescent supply current per
CC
input pin
NOTES:
1. All typical values are at V
p
p
p
= 3.3V and T
CC
amb
= 25°C.
VCC = 1.2V V
VCC = 2.7 to 3.6V 2.0
VCC = 1.2V GND
VCC = 2.7 to 3.6V 0.8
VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC0.5
VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC0.2 V
VCC = 3.0V; VI = VIH or V
VCC = 3.0V; VI = VIH or V
IO = –18mA VCC0.6
IL;
IO = –24mA VCC0.8
IL;
VCC = 2.7V; VI = VIH or VIL; IO = 12mA 0.40
VCC = 3.0V; VI = VIH or VIL; IO = 100µA GND 0.20
VCC = 3.0V; VI = VIH or V
IO = 24mA 0.55
IL;
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA
CC
CC
0.1 5
0.1 15
10
10
V
µA
µA
µA
µA
1998 Jul 29
7
Page 8
Philips Semiconductors Product specification
74LVC652Octal transceiver/register with dual enable (3-State)
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF
LIMITS
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V VCC = 1.2V UNIT
MIN TYP1MAX MIN MAX MIN TYP
t
PHL/tPLH
t
PHL/tPLH
t
PHL/tPLH
t
PZH/tPZL
t
PHZ/tPLZ
t
PZH/tPZL
t
PHZ/tPLZ
t
W
t
su
t
h
f
max
NOTE:
1. These typical values are at V
Propagation delay
An to Bn, Bn to An
Propagation delay
CPAB, CPBA to Bn, A
n
Propagation delay
SAB, SBA to Bn, A
n
3-State output enable time
OEAB to Bn
3-State output disable time
OEAB to Bn
3-State output enable time
OEBA to An
3-State output disable time
OEBA to An
Clock pulse width
HIGH or LOW
CPAB or CP
BA
Set-up time
An, Bn to CPAB, CP
BA
Hold time
An, Bn to CPAB, CP
BA
Maximum clock pulse
frequency
= 3.3V and T
CC
Figures 1, 5 1.5 4.6 7.9 1.5 9.2 1.5 24 ns
Figures 2, 5 1.5 5.2 8.9 1.5 11 1.5 26 ns
Figures 3, 5 1.5 5.2 8.8 1.5 11 1.5 27 ns
Figures 4, 5 1.5 4.8 8.0 1.5 10 1.5 20 ns
Figures 4, 5 1.5 4.4 8.0 1.5 10 1.5 10 ns
Figures 4, 5 1.5 4.8 8.0 1.5 10 1.5 20 ns
Figures 4, 5 1.5 4.4 8.0 1.5 10 1.5 10 ns
Figures 4, 5 – 3.0 – 3.0 – – – ns
Figure 2 1.5 0.5 – 1.5 – – – ns
Figure 2 1.0 0 – 1.0 – – – ns
Figure 2 7.5 150 – – – – – MHz
= 25°C.
amb
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V
V
= 0.5V * VCC at V
M
and V
V
OL
output load.
= V
V
X
V
= V
X
= V
V
Y
V
= V
Y
An, B
OUTPUT
are the typical output voltage drop that occur with the
OH
+ 0.3V at VCC w 2.7V
OL
+ 0.1VCC at VCC < 2.7V
OL
– 0.3V at VCC w 2.7V
OH
– 0.1VCC at VCC < 2.7V
OH
V
I
n
INPUT
GND
t
PLH
V
OH
Bn, A
n
V
OL
Figure 1. Input An, Bn to output Bn, An propagation delays.
CC
V
t 2.7V
M
V
t
PHL
M
SV00772
V
I
An, B
n
V
INPUT
CPAB, CP
OUTPUT
Bn, A
OUTPUT
GND
V
OH
V
V
OH
V
BA
OL
OL
M
t
PLH
t
su
t
h
SV00773
t
h
t
su
V
M
t
W
1/f
max
n
t
PHL
Figure 2. An, Bn to CPAB, CPBA set-up and hold times, clock
, CPBA pulse width, maximum clock pulse frequency and
CP
AB
the CP
, CPBA to output Bn, An propagation delays.
AB
1998 Jul 29
8
Page 9
Philips Semiconductors Product specification
74LVC652Octal transceiver/register with dual enable (3-State)
AC WAVEFORMS (Continued)
VM = 1.5V at VCC 2.7V
V
= 0.5V * VCC at V
M
and V
V
OL
output load.
= V
V
X
V
= V
X
= V
V
Y
= V
V
Y
SAB, S
are the typical output voltage drop that occur with the
OH
+ 0.3V at VCC 2.7V
OL
+ 0.1VCC at VCC < 2.7V
OL
– 0.3V at VCC 2.7V
OH
– 0.1VCC at VCC < 2.7V
OH
V
I
BA
INPUT
GND
t
V
OH
Bn, A
n
OUTPUT
V
OL
Figure 3. Input SAB, SBA to output Bn, An propagation delay
PHL
CC
2.7V
V
M
V
M
times.
t
PLH
SV00774
TEST CIRCUIT
PULSE
GENERATOR
V
V
CC
2.7V V
2.7V – 3.6V 2.7V
Figure 5. Load circuitry for switching times.
S
1
2 x V
V
CC
50pF
Open
2 x V
GND
500Ω
500Ω
1
CC
I
D.U.T.
R
T
V
I
CC
V
O
C
L
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Test S
Open
GND
SY00003
CC
V
I
OEAB INPUT
GND
V
OEBA INPUT
GND
V
OUTPUT
LOW–to–OFF
OFF–to–LOW
V
V
OH
OUTPUT
HIGH–to–OFF
OFF–to–HIGH
GND
CC
CC
OL
V
M
V
M
t
PLZ
t
outputs
enabled
PHZ
t
PZL
V
t
PZH
M
V
M
SV00775
outputs
enabled
V
X
V
Y
outputs
disabled
Figure 4. OE inputs (OEAB, OEBA) to outputs An, Bn enable and
disable times.
1998 Jul 29
9
Page 10
Philips Semiconductors Product specification
74LVC652Octal transceiver/register with dual enable (3-State)
APPLICATION INFORMATION
Real-time transfer; bus B to bus A
Real-time transfer; bus A to bus B
OE
AB
BUS A
OEBA CP
AB
CP
BA
SV00781
BUS B
S
AB
S
BA
LLXXXL
Store A, B or A and B
in one register
OE
AB
BUS A
OEBA CP
AB
CP
BA
SV00783
BUS B
S
AB
S
BA
XH↑↑LX
LXX↑ XX
LH↑↑XX
OE
AB
BUS A
OEBA CP
AB
CP
BA
BUS B
SV00782
S
AB
S
BA
HHXXLX
Transfer A stored data to B bus or B stored data
to A bus or both at the same time
OE
AB
BUS A
OEBA CP
AB
CP
BA
SV00784
BUS B
S
AB
S
BA
H H H or L X H X
L L X H or L X H
H L H or L H or L H H
Store bus A in both registers or
store bus B in both registers
OE
AB
BUS A
OEBA CP
AB
CP
BA
BUS B
SV00785
S
AB
S
HH↑↑LX
LL↑↑XL
1998 Jul 29
BA
10
Isolation
OE
AB
BUS A
OEBA CP
AB
CP
BA
SV00786
BUS B
S
AB
L H H or L H or L X X
S
BA
Page 11
Philips Semiconductors Product specification
Octal transceiver/register with dual enable (3-State)
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
74LVC652
1998 Jul 29
11
Page 12
Philips Semiconductors Product specification
Octal transceiver/register with dual enable (3-State)
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
74LVC652
1998 Jul 29
12
Page 13
Philips Semiconductors Product specification
Octal transceiver/register with dual enable (3-State)
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1
74LVC652
1998 Jul 29
13
Page 14
Philips Semiconductors Product specification
Octal transceiver/register with dual enable (3-State)
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
74LVC652
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 08-98
Document order number: 9397-750-04517
yyyy mmm dd
14
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