Datasheet 74LVC646APW, 74LVC646ADB, 74LVC646AD Datasheet (Philips)

74LVC646A
Octal bus transceiver/register (3-State)
Product specification Supercedes data of 1998 Mar 25 IC24 Data Handbook
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1998 Jul 29
Philips Semiconductors Product specification
74L VC646AOctal bus transceiver/register (3-State)
FEA TURES
Wide supply voltage range of 1.2V to 3.6V
Flow-through pin-out architecture
In accordance with JEDEC standard no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic
DESCRIPTION
The 74LVC646A is a high performance, low-power, low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment.
The 74LVC646A consist of non-inverting bus transceiver circuits with 3-State outputs, D-type flip-flops and control circuitry arranged
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PHL/tPLH
f
max
C
I
C
I/O
C
PD
NOTES:
1. C
is used to determine the dynamic power dissipation (PD in µW)
PD
= CPD V
P
D
f
= input frequency in MHz; CL = output load capacitance in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
Σ (C
L
2. The condition is V
= 25°C; tr = tf 2.5 ns
amb
2
CC
2
V
fo) = sum of the outputs.
CC
I
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay An to Yn
Maximum clock frequency 250 MHz Input capacitance 5.0 pF Input/output capacitance 10 pF Power dissipation capacitance per gate Notes 1, 2 26 pF
CC.
2
fo) where:
CC
x fi Σ (CL V
= GND to V
for multiplexed transmission of data directly from the internal registers. Data on the ‘A’ or ‘B’ bus will be clocked in the internal registers, as the appropriate clock (CPAB or CPBA) goes to a HIGH logic level. Output enable (OE provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the ‘A’ or ‘B’ register, or in both. The select source inputs (SAB and SBA) can multiplex stored and real-time (transparent mode) data.
The direction (DIR) input determines which bus will receive data when OE data may be stored in the ‘B’ register and/or ‘B’ data may be stored in the ‘A’ register.
When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, ‘A’ or ‘B’ may be driven at a time.
The ‘646A’ is functionally identical to the ‘648A’ but has non-inverting data paths.
CL = 50pF VCC = 3.3V 3.9
is active (LOW). In the isolation mode (OE = HIGH), ‘A’
) and direction (DIR) inputs are
ns
ORDERING AND PACKAGE INFORMA TION
PACKAGES TEMPERATURE RANGE
24-Pin Plastic SO –40°C to +85°C 74LVC646A D 74LVC646A D SOT137-1 24-Pin Plastic SSOP Type II –40°C to +85°C 74LVC646A DB 74LVC646A DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC646A PW 7LVC646APW DH SOT355-1
1998 Jul 29 853-2105 19803
OUTSIDE NORTH
AMERICA
2
NORTH AMERICA PKG. DWG. #
Philips Semiconductors Product specification
FUNCTION
74LVC646AOctal bus transceiver/register (3-State)
PIN CONFIGURATION
CP
GND
S
DIR
AB AB
A A A A A A A A
1 2 3 4
0
5
1
6
2
7
3
8
4
9
5
10
6
11
7
12
24 23 22 21 20 19
18
17
16
15 14 13
SV00766
V CP S OE B B B B B B B B
CC
BA
BA
0 1 2 3 4 5 6 7
FUNCTION TABLE
INPUTS DATA I/O *
OE DIR CP
X X
H H
L L
L L
X X
X X
L L
H H
H or L↑H or L
H or L
* The data output functions may be enabled or disabled by
various signals at the OE and DIR inputs. Data input functions are always enabled, i.e., data at the bus inputs will be stored on every LOW-to-HIGH transition on the clock inputs. un = unspecified H = HIGH voltage level L = LOW voltage level X = Don’t care = LOW-to-HIGH level transition
CP
AB
X
X
X X
X
X
H or L
X X
BA
S
AB
X X
X X
X X
L H
S
BA
X X
X X
L
H X
X
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION 1 CP 2 S
3 DIR Direction control input 4, 5, 6, 7, 8,
9, 10, 11 12 GND Ground (0V) 20, 19, 18, 17,
16, 15, 14, 13 21 OE Output enable input (active LOW) 22 S
23 CP 24 V
A0 to A
7
input
un *
input input
output input
input output
B0 to B
input
un *
7
AB
AB
A0 to A
B0 to B
BA
BA
CC
‘A’ to ‘B’ clock input (LOW-to-HIGH, edge-triggered)
Select ‘A’ to ‘B’ source input
‘A’ data inputs/outputs
7
‘B’ data inputs/outputs
7
Select ‘B’ to ‘A’ source input ‘B’ to ‘A’ clock input
(LOW-to-HIGH, edge-triggered) Positive supply voltage
store A, B unspecified *
store B, A unspecified *
store A and B data,
isolation hold storage
real-time B data to A bus
stored B data to A bus
real-time A data to B bus
stored A data to B bus
1998 Jul 29
3
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
LOGIC SYMBOL
1 2 4 5 6 7 8
9 10 11
AB
S
AB
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
DIR
OE
CP
LOGIC SYMBOL (IEEE/IEC)
23
1 21 22
2
3
4
5
6
7
8
9
10
11
C4 C5
G3 G6
G7 3EN2 3EN1
5D
1
6
1
6
7 7
1
FUNCTIONAL DIAGRAM
21
CP
S
3
4D
1
1
2
BA BA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
SV00765
23 22
20 19
18 17 16 15 14 13
20 19
18
17
16
15
14
13
4
A
0
A
5
1
A
6
2
A
7
3
A
8
4
A
9
5
A
10
6
A
11
7
21
OE
3
DIR
2
S
AB
22
S
BA
1
CP
AB
23
CP
BA
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
SV00763
20 19
18 17 16 15 14 13
1998 Jul 29
SV00764
4
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
LOGIC DIAGRAM
OE
DIR
S
BA
CP
BA
S
AB
CP
AB
V
CC
S
D
Y
1
A
n
S
D
Y
1
MUX
D
FF
CP
8 identical channels
D
Q
2
n
MUX
D
Q
D
2
FF
n
CP
V
CC
B
n
SV00762
1998 Jul 29
5
Philips Semiconductors Product specification
SYMBOL
PARAMETER
CONDITIONS
UNIT
V
V
V
V
V
V
P
TOT
74LVC646AOctal bus transceiver/register (3-State)
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
DC supply voltage (for max. speed performance) 2.7 3.6
CC
DC supply voltage (for low-voltage applications) 1.2 3.6
T
V
amb
tr, t
DC input voltage range 0 5.5 V
I
DC output voltage range; output HIGH or LOW state 0 V
O
DC output voltage range; output 3-State 0 5.5 Operating free-air temperature range –40 +85 °C
Input rise and fall times
f
VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V
0 0
20 10
CC
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V)
SYMBOL PARAMETER CONDITIONS RATING UNIT
V
CC
I
IK
V
I
I
OK
DC supply voltage –0.5 to +6.5 V DC input diode current VI t0 –50 mA DC input voltage Note 2 –0.5 to +6.5 V DC output diode current V
uVCC or VO t 0 "50 mA
O
DC output voltage; output HIGH or LOW Note 2 –0.5 to VCC +0.5
I
GND
O
I
O
, I
T
stg
DC output voltage; output 3-State Note 2 –0.5 to 6.5 DC output diode current VO = 0 to V DC VCC or GND current "100 mA
CC
CC
"50 mA
Storage temperature range –65 to +150 °C Power dissipation per package
– plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500 – plastic shrink mini-pack (SSOP and
TSSOP)
above +60°C derate linearly with 5.5 mW/K 500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jul 29
6
Philips Semiconductors Product specification
VIHHIGH level Input voltage
V
VILLOW level Input voltage
V
VOHHIGH level output voltage
V
74LVC646AOctal bus transceiver/register (3-State)
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP1MAX
V
I
IHZ/IILZ
I
I
OFF
I
I
LOW level output voltage
OL
I
Input leakage current VCC = 3.6V; VI = 5.5V or GND Not for I/O pins "0.1 "5 µA
I
Input current for common I/O pins VCC = 3.6V; VI = VCC or GND "0.1 "15 µA 3-State output OFF-state current VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND 0.1 "10 µA
OZ
Power off leakage current VCC = 0.0V; VI or VO = 5.5V 0.1 "10 µA Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 10 µA
CC
Additional quiescent supply current per
CC
input pin
NOTES:
1. All typical values are at V
p
p
p
= 3.3V and T
CC
amb
= 25°C.
VCC = 1.2V V VCC = 2.7 to 3.6V 2.0 VCC = 1.2V GND VCC = 2.7 to 3.6V 0.8 VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5 VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC*0.2 V VCC = 3.0V; VI = VIH or V VCC = 3.0V; VI = VIH or V
IO = –18mA VCC*0.6
IL;
IO = –24mA VCC*0.8
IL;
VCC = 2.7V; VI = VIH or VIL; IO = 12mA 0.40 VCC = 3.0V; VI = VIH or VIL; IO = 100µA GND 0.20 VCC = 3.0V; VI = VIH or V
IO = 24mA 0.55
IL;
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA
CC
CC
V
1998 Jul 29
7
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
AC CHARACTERISTICS
GND = 0 V; tr = tf 2.5 ns; CL = 50 pF
LIMITS
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V
MIN TYP1MAX MIN MAX TYP
t
PHL/tPLH
t
PHL/tPLH
t
PHL/tPLH
t
PZH/tPZL
t
PHZ/tPLZ
t
PZH/tPZL
t
PHZ/tPLZ
Propagation delay An, Bn to Bn, An
Propagation delay CPAB, CPBA to Bn, A
n
Propagation delay SAB, SBA to Bn, A
n
3-State output enable time OEn to An, Bn
3-State output disable time OEn to An, Bn
3-State output enable time DIR to An, Bn
3-State output disable time DIR to An, Bn
Figures 1, 6 1.5 3.9 6.8 1.5 7.8 15 ns
Figures 2, 6 1.5 4.6 7.6 1.5 8.6 19 ns
Figures 3, 6 1.5 4.9 8.5 1.5 9.5 19 ns
Figures 4, 6 1.5 4.5 7.8 1.5 8.8 20 ns
Figures 4, 6 1.5 3.9 6.1 1.5 7.1 10 ns
Figures 5, 6 1.5 4.6 7.9 1.5 8.9 20 ns
Figures 5, 6 1.5 3.5 6.0 1.5 7.0 12 ns
Clock pulse width HIGH or LOW CPAB or CP
BA
Set-up time An, Bn to CPAB, CP
Hold time An, Bn to CPAB, CP
BA
BA
Figure 1, 3 3.3 1.9 3.3 ns
Figure 2 1.6 0.35 1.6 ns
Figure 2 1.0 –0.3 1.0 ns
Maximum clock pulse frequency Figure 2 150 250 125 ns
f
max
t
W
t
su
t
h
NOTE:
1. These typical values are at V
= 3.3V and T
CC
amb
= 25°C.
VCC =
1.2V
UNIT
1998 Jul 29
8
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V V
= 0.5V * VCC at V
M
and V
V
OL
output load. V
X
V
X
V
Y
V
Y
OH
= V
+ 0.3V at VCC w 2.7V
OL
= V
+ 0.1VCC at VCC < 2.7V
OL
= V
– 0.3V at VCC w 2.7V
OH
= V
– 0.1VCC at VCC < 2.7V
OH
V
I
An, B
n
INPUT
GND
V
OH
Bn, A
n
OUTPUT
V
OL
are the typical output voltage drop that occur with the
t
PLH
CC
t 2.7V
V
M
V
I
SAB, S
BA
INPUT
GND
t
PHL
V
OH
Bn, A
n
OUTPUT
V
OL
t
PHL
V
M
V
M
t
PLH
V
M
SV00759
Figure 3. Input SAB, SBA to output Bn, An propagation delay
times.
SV00761
Figure 1. Input An, Bn to output Bn, An propagation delays.
V
I
An, B
n
V
M
t
h
t
su
V
M
t
W
1/f
max
t
PHL
t
PLH
t
su
t
h
SV00760
CPAB, CP
OUTPUT
Bn, A
OUTPUT
INPUT
GND
V
OH
BA
V
OL
V
OH
V
OL
n
Figure 2. An, Bn to CPAB, CPBA set-up and hold times, clock
CP
, CPBA pulse width, maximum clock pulse frequency and
AB
the CP
, CPBA to output Bn, An propagation delays.
AB
V
I
OE INPUT
GND
V
CC
OUTPUT LOW–to–OFF OFF–to–LOW
V
OL
V
OH
OUTPUT HIGH–to–OFF OFF–to–HIGH
GND
V
M
t
PLZ
t
outputs
enabled
PHZ
t
PZL
V
t
PZH
M
V
M
outputs enabled
SV00758
V
X
V
Y
outputs
disabled
Figure 4. Input OE to output An, Bn 3-State enable and disable
times.
1998 Jul 29
9
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
AC WAVEFORMS (
VM = 1.5V at VCC w 2.7V V
= 0.5V * VCC at V
M
and V
V
OL
output load. V V V V
X X Y Y
= V = V = V = V
OL OL OH OH
DIR INPUT
An OUTPUT
An OUTPUT
Bn OUTPUT
Bn OUTPUT
OH
+ 0.3V at V + 0.1VCC at VCC < 2.7V
– 0.3V at VCC w 2.7V – 0.1VCC at VCC < 2.7V
GND
V
GND
V
V
V
V
V
CC
are the typical output voltage drop that occur with the
CC
V
I
V
OH
V
CC
OL
OH
OL
OH
OL
Continued
t 2.7V
w 2.7V
M
t
PHZ
V
Y
t
PLZ
V
X
t
PZH
V
M
t
PZL
V
M
)
t
PZH
V
M
t
PZL
V
M
t
PHZ
V
Y
t
PHZ
V
X
TEST CIRCUIT
PULSE
GENERATOR
V
V
CC
t 2.7V V
2.7V – 3.6V 2.7V
Figure 6. Load circuitry for switching times.
S
1
2 x V
V
CC
50pF
Open
2 x V
GND
500
500
1
CC
I
D.U.T.
R
T
V
I
CC
V
O
C
L
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Test S
Open GND
SY00003
CC
SV00757
Figure 5. Input DIR to output An, Bn 3-State enable and disable
times.
1998 Jul 29
10
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
APPLICATION INFORMATION
Real-time transfer; bus B to bus A
Real-time transfer; bus A to bus B
BUS A
BUS B
SV00777
(1) (14) (28) (16) (27) (15) OE
DIR CP
AB
CP
BA
S
AB
S
BA
LLXXXL
Storage from A, B or A and B
BUS A
BUS B
SV00778
(1) (14) (28) (16) (27) (15)
OE
DIR CP
AB
CP
BA
S
AB
S
BA
LHXXLX
Transfer storage data to A or B
BUS A
SV00779
(1) (14) (28) (16) (27) (15) OE
DIR CP
AB
CP
BA
S
AB
S XX XXX XXX XL HX↑↑XX
1998 Jul 29
BUS B
BA
BUS A
BUS B
SV00780
(1) (14) (28) (16) (27) (15)
OE
DIR CP
AB
CP
BA
S
AB
S
BA
L L X H or L X H L H H or L X H X
11
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
1998 Jul 29
12
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
1998 Jul 29
13
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
1998 Jul 29
14
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
NOTES
1998 Jul 29
15
Philips Semiconductors Product specification
74LVC646AOctal bus transceiver/register (3-State)
Data sheet status
Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 08-98 Document order number: 9397-750-04516
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