Product specification
Supersedes data of 1997 Jun 30
IC24 Data Handbook
1998 Jul 31
Page 2
Philips SemiconductorsProduct specification
Octal D-type registered transceiver (3-State)
FEA TURES
•5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
•Supply voltage range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8–1A
•CMOS low power consumption
•Direct interface with TTL levels
•8-bit octal transceiver with D-type latch
•Back-to-back registers for storage
•Separate controls for data flow in each direction
•3-State non-inverting outputs for bus oriented applications
•High impedance when V
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PHL/tPLH
C
I
C
I/O
C
PD
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
P
= CPD x V
D
= input frequency in MHz; CL = output load capacity in pF;
f
i
f
= output frequency in MHz; VCC = supply voltage in V;
o
Σ (C
L
2. The condition is V
x V
amb
CC
= 25°C; Tr = T
Propagation delay
An to B
input capacitance5.0pF
input/output capacitance10.0pF
power dissipation capacitance per latchVCC = 3.3V27pF
2
x fi +Σ (CL x V
CC
2
x f
o )
= 0V
CC
≤ 2.5ns
f
PARAMETERCONDITIONSTYPICALUNIT
n
2
x f
CC
= sum of the outputs
= GND to V
I
CC
where:
o )
DESCRIPTION
The 74LVC543A is a high–performance, low–power, low–voltage,
Si–gate CMOS device and superior to most advanced CMOS
compatible TTL families.
The 74LVC543A is an octal registered transceiver containing two
sets of D–type latches for temporary storage of the data flow in
either direction. Separate latch enable (LE
enable (OE
independent control of inputting and outputting in either direction of
the data flow.
The 74LVC543A contains eight D–type latches, with separate inputs
and controls for each set. For data flow from A to B, for example, the
A–to–B enable (E
A
0–A7
With E
input makes the A–to–B latches transparent; a subsequent LOW–to
HIGH transition of the LEAB signal puts the A data into the latches
where it is stored and the B outputs no longer change with the A
inputs. With E
are active and display the data present at the outputs of the A
latches
74LVC543A
, LEBA) and output
, OEBA) inputs are provided for each register to permit
AB
) input must be LOW in order to enter data from
or take data from B0–B7, as indicated in the function table.
LOW, a LOW signal on the A–to–B latch enable (LEAB)
AB
AB
and OEAB both low, the 3–state B output buffers
AB
CL = 50 pF
VCC = 3.3V
AB
3.3ns
ORDERING INFORMATION
PACKAGES
24-Pin P lastic Small Outline (SO)–40°C to +85°C74LVC543A D74LVC543A DSOT137-1
24-Pin Plastic Shrink Small Outline (SSOP) Type II–40°C to +85°C74LVC543A DB74LVC543A DBSOT340-1
24-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I–40°C to +85°C74LVC543A PW7LVC543APW DHSOT355-1
XX =AB for A-to-B direction, BA for B-to-A direction
H=High voltage level
L=Low voltage level
h=High state must be present one setup time before the Low-to-High transition of LE
l=Low state must be present one setup time before the Low-to-High transition of LEAB, LEBA, EAB, E
X=Don’t care
↑=Low-to-High level transition
NC =No change
Z=High impedance OFF state
DC supply voltage (for max. speed performance)2.73.6V
DC supply voltage (for low-voltage applications)1.23.6V
DC Input voltage range05.5V
I
DC Output voltage range; output HIGH or LOW
state
0V
DC input voltage range; output 3-State05.5V
Operating ambient temperature range in free-air–40+85°C
Input rise and fall times
f
VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V
0
0
20
10
CC
V
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
I
IK
V
I
I
OK
DC supply voltage–0.5 to +6.5V
DC input diode currentVI 0–50mA
DC input voltageNote 2–0.5 to +6.5V
DC output diode currentV
PARAMETERCONDITIONSRATINGUNIT
VCC or VO 050mA
O
DC output voltage; output HIGH or LOW stateNote 2–0.5 to VCC +0.5V
I/O
DC input voltage; output 3-StateNote 2–0.5 to 6.5V
I
GND
I
T
stg
DC output source or sink currentVO = 0 to V
O
, I
DC VCC or GND current100mA
CC
CC
50mA
Storage temperature range–65 to +150°C
Power dissipation per package
P
TOT
– plastic mini-pack (SO)above +70°C derate linearly with 8 mW/K500
– plastic shrink mini-pack (SSOP and TSSOP)above +60°C derate linearly with 5.5 mW/K500
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOLPARAMETERTEST CONDITIONSTemp = -40°C to +85°CUNIT
MINTYP1MAX
V
I
IHZ/IILZ
I
OZ
I
I
CC
∆I
LOW level output voltage
OL
I
Input leakage currentVCC = 3.6V; VI = 5.5V or GNDNot for I/O pins0.15µA
I
Input current for common I/O pinsVCC = 3.6V; VI = 5.5V or GND0.115µA
3-State output OFF-state currentVCC = 3.6V; VI = VIH or VIL;VO = 5.5V or GND0.110µA
Power off leakage supplyVCC = 0.0V; V
off
Quiescent supply currentVCC = 3.6V; VI = VCC or GND; IO = 00.110µA
Additional quiescent supply current
CC
per input pin
NOTE:
1. All typical values are at V
p
p
p
= 3.3V and T
CC
amb
VCC = 1.2VV
VCC = 2.7 to 3.6V2.0
VCC = 1.2VGND
VCC = 2.7 to 3.6V0.8
VCC = 2.7V; VI = VIH or VIL;IO = –12mAVCC0.5
VCC = 3.0V; VI = VIH or VIL;IO = –100µAVCC0.2V
VCC = 3.0V; VI = VIH or V
VCC = 3.0V; VI = VIH or V
= –18mAVCC0.6
IL;IO
= –24mAVCC0.8
IL;IO
VCC = 2.7V; VI = VIH or VIL;IO = 12mA0.40
VCC = 3.0V; VI = VIH or VIL;IO = 100µAGND0.20
VCC = 3.0V; VI = VIH or V
Waveform 2. Latch enable input (LEXX) pulse width and the
latch enable input to output (A
, Bn) propagation delays.
n
V
I
An, B
n
INPUT
GND
V
I
LEXX, E
XX
INPUT
GND
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
V
M
th
t
SU
V
M
th
t
SU
SW00211
Waveform 4. Data setup and hold times for the (An, Bn) input
to the LE
and EXX inputs.
XX
TEST CIRCUIT
S
1
2<V
Open
GND
RL=500 Ω
RL=500 Ω
CC
PULSE
GENERATOR
V
CC
D.U.T.
V
OUT
C
L
V
IN
R
T
V
I
OEXX, E
XX
INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
V
M
t
PLZ
outputs
enabled
t
PHZ
t
PZL
V
X
t
PZH
V
Y
outputs
disabled
Waveform 3. 3-State enable and disable times
V
M
V
M
outputs
enabled
SW00210
Test Circuit for 3-State Outputs
SWITCH POSITION
TESTSWITCH
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Open
2<V
GND
CC
V
CC
t 2.7V
2.7 – 3.6V
V
V
2.7V
DEFINITIONS
RL =Load resistor
C
= Load capacitance includes jig and probe capacitance
L
R
=Termination resistance should be equal to Z
T
of pulse generators.
Waveform 5. Load circuitry for switching times.
IN
CC
OUT
SW00047
1998 Jul 31
7
Page 8
Philips SemiconductorsProduct specification
Octal D-type registered transceiver (3-State)
SO16: plastic small outline package; 16 leads; body width 3.9 mmSOT109-1
74LVC543A
1998 Jul 31
8
Page 9
Philips SemiconductorsProduct specification
Octal D-type registered transceiver (3-State)
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mmSOT338-1
74LVC543A
1998 Jul 31
9
Page 10
Philips SemiconductorsProduct specification
Octal D-type registered transceiver (3-State)
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mmSOT403-1
74LVC543A
1998 Jul 31
10
Page 11
Philips SemiconductorsProduct specification
Octal D-type registered transceiver (3-State)
NOTES
74LVC543A
1998 Jul 31
11
Page 12
Philips SemiconductorsProduct specification
Octal D-type registered transceiver (3-State)
74LVC543A
DEFINITIONS
Data Sheet IdentificationProduct StatusDefinition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Telephone 800-234-7381
print codeDate of release: 05-96
Document order number:9397-750-04511
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