Datasheet 74LVCH32244A, 74LVC32244A Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

74LVC32244A; 74LVCH32244A

32-bit buffer/line driver; 5 V
input/output tolerant; 3-state

Product specification
File under Integrated Circuits, IC24

1999 Aug 31

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

FEATURES

• 5 V tolerant inputs/outputs for interfacing with 5 V logic

• Wide supply voltage range of 1.2 to 3.6 V

• CMOS low power consumption

• MULTIBYTE flow-trough standardpin-out architecture

• Low inductance multiple power and ground pins for

minimum noise and ground bounce

• Direct interface with TTL levels

• Bus hold on data inputs (74LVCH32244A only)

• Typical output ground bounce voltage:

V

<0.8 V at VCC= 3.3 V; T

OLP

• Typical output VOH undershoot voltage:
V

>2VatVCC= 3.3 V; T

OHV

• Power-off disabled outputs, permitting live insertion

• Plastic fine-pitch ball grid array package.

amb

amb

=25°C

=25°C

74LVC32244A;

74LVCH32244A

DESCRIPTION

The 74LVC(H)32244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 V. These features allow the use of
these devices in a mixed 3.3 and 5 V environment.

The 74LVC(H)32244A is a 32-bit non-inverting buffer/line
driver with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs 1OE and 2OE.
A HIGH on input nOE causes the outputs to assume a
high-impedance OFF-state.

To ensure the high-impedance state during power-up or
power-down, input nOE should be tied to VCC through a
pull-up resistor; the minimum value of the resistor is
determined by the current-sinking capability of the driver.

The 74LVCH32244A bus hold data input circuiteliminates
the need for external pull-up resistors to hold unused or
floating data inputs at a valid logic level (see Fig.3).

QUICK REFERENCE DATA

Ground = 0 V; T

=25°C; tr=tf≤2.5 ns.

amb

SYMBOL PARAMETER CONDITIONS TYPICAL UNIT

t

PHL/tPLH

C

I

C

PD

propagation delay nAnto nY

n

CL= 50 pF; VCC= 3.3 V 3.0 ns
input capacitance 5.0 pF
power dissipation capacitance per buffer VI= GND to VCC; note 1 25 pF

Note

1. C

is used to determine the dynamic power dissipation (PDin µW).

PD

PD=CPD× V

2

× fi+ Σ(CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;

= supply voltage in Volts;

V

CC

Σ(CL× V

2

× fo) = sum of the outputs.

CC

1999 Aug 31 2

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

FUNCTION TABLE

See note 1.

INPUT OUTPUT

n

OE nA

LLL
LHH

HXZ

Note

1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.

ORDERING INFORMATION

TYPE NUMBER

74LVC32244AEC −40 to +85 °C 96 LFBGA96 plastic SOT536-1
74LVCH32244AEC 96 LFBGA96 plastic SOT536-1

TEMPERATURE

RANGE

n

PACKAGES

PINS PACKAGE MATERIAL CODE

74LVC32244A;

74LVCH32244A

nY

n

PINNING

SYMBOL DESCRIPTION

nA

n

nY

n

GND ground (0 V)

nOE 3-state output enable inputs (active LOW)

V

CC

data inputs
data outputs

DC supply voltage

1999 Aug 31 3

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

handbook, full pagewidth

6

1A11A32A12A33A13A34A14A25A15A36A16A37A17A38A18A

5

1A01A22A02A23A03A24A04A35A05A26A06A27A07A28A08A

2OE 3OE 6OEGND GND GND GND 7OEV

4

1OE

3 4OE 5OEGND GND GND GND 8OEV

1Y01Y22Y02Y23Y03Y24Y04Y35Y05Y26Y06Y27Y07Y28Y08Y

2

1Y11Y32Y12Y33Y13Y34Y14Y25Y15Y36Y16Y37Y17Y38Y18Y

1

AHJBDEG TCF KMNRLP

CC

CC

V

CC

V

CC

GND GND GND GNDV

GND GND GND GNDV

CC

CC

74LVC32244A;

74LVCH32244A

MNA471

2

3

V

CC

V

CC

3

2

handbook, full pagewidth

A5

A6

B5

B6

A3

C5

C6

D5

D6

A4

1A

1A

1A

1A

1OE

2A

2A

2A

2A

2OE

Fig.1 Pin configuration.

0

1

2

3

0

1

2

3

1Y

1Y

1Y

1Y

2Y

2Y

2Y

2Y

0

A2

1

A1

2

B2

3

B1

0

C2

1

C1

2

D2

3

D1

E5

E6

F5

F6

H4

G5

G6

H6

H5

H3

3A

3A

3A

3A

3OE

4A

4A

4A

4A

4OE

0

1

2

3

0

1

2

3

3Y

3Y

3Y

3Y

4Y

4Y

4Y

4Y

0

E2

1

E1

2

F2

3

F1

0

G2

1

G1

2

H1

3

H2

K5

K6

L5

L6

M5

M6

5A

0

J5

5A

1

J6

5A

2

5A

3

5OE

J3

6A

0

6A

1

6A

2

6A

3

6OE

J4

5Y

5Y

5Y

5Y

6Y

6Y

6Y

6Y

0

J2

1

J1

2

K2

3

K1

0

L2

1

L1

2

M2

3

M1

N5

N6

P5

P6

T4

R5

R6

T6

T5

T3

7A

7A

7A

7A

7OE

8A

8A

8A

8A

8OE

0

1

2

3

0

1

2

3

7Y

0

7Y

1

7Y

2

7Y

3

8Y

0

8Y

1

8Y

2

8Y

3

MNA472

N2

N1

P2

P1

R2

R1

T1

T2

Fig.2 Logic symbol.

1999 Aug 31 4

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

data

input

V

CC

handbook, halfpage

74LVC32244A;

74LVCH32244A

to internal circuit

MNA473

Fig.3 Bus hold circuit.

1999 Aug 31 5

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

74LVC32244A;

74LVCH32244A

RECOMMENDED OPERATING CONDITIONS

LIMITS

SYMBOL PARAMETER CONDITIONS

UNIT

MIN. MAX.

V

CC

DC supply voltage for max. speed performance 2.7 3.6 V

for low-voltage applications 1.2 3.6 V

V

I

V

O

DC input voltage 0 5.5 V
DC output voltage range; output HIGH or LOW state 0 V

CC

V

3-state 0 5.5 V

T

amb

operating ambient temperature see DC and AC characteristics

−40 +85 °C

per device

t

(∆t/∆f) input rise and fall times ratio VCC= 1.2 to 2.7 V 0 20 ns/V

r,tf

V

= 2.7 to 3.6 V 0 10

CC

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground= 0 V).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

V

I

I

IK

I

OK

V

O

DC supply voltage −0.5 +6.5 V
DC input voltage note 1 −0.5 +6.5 V
DC input diode current VI<0 −−50 mA
DC output diode current VO>VCCor VO< 0; note 1 −±50 mA
DC output voltage output HIGH or LOW state; note 1 −0.5 VCC+ 0.5 V

output 3-state; note 1 −0.5 +6.5 V

I

O

I

, I

CC

GND

T

stg

P

D

DC output source or sink current VO= 0 to V

CC

−±50 mA
DC VCC or GND current −±100 mA
storage temperature −65 +150 °C
power dissipation per packages temperature range:

− 1000 mW

−40 to +85 °C; note 2

Notes

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. Above 70 °C the value of P

derates linearly with 1.8 mW/K.

D

1999 Aug 31 6

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

DC CHARACTERISTICS

Over recommended operating conditions; voltage are referenced to GND (ground=0V).

TEST CONDITIONS T

SYMBOL PARAMETER

V

IH

V

IL

V

OH

V

OL

I

I

I

OZ

I

off

I

CC

∆I

CC

HIGH-level input voltage 1.2 V

LOW-level input voltage 1.2 −−GND V

HIGH-level output voltage VI=VIHor V

LOW-level output voltage VI=VIHor V

input leakage current VI= 5.5 Vor GND;

3-state output OFF-state current VI=VIHor VIL;

power off leakage supply VIor VO= 5.5 V 0.0 − 0.1 ±10 µA
quiescent supply current VI=VCCor GND; IO= 0 3.6 − 0.1 40 µA
additional quiescent supply

current per input pin

I

BHL

I

BHH

I

BHLO

I

BHHO

bus hold LOW sustaining current VI= 0.8 V;

bus hold HIGH sustaining current VI= 2.0 V;

bus hold LOW overdrive current notes 3, 4 and 6 3.6 500 −−µA
bus hold HIGH overdrive current notes 3, 4 and 6 3.6 −500 −−µA

note 2

VO= 5.5 Vor GND

VI=VCC− 0.6 V; IO= 0 2.7 to 3.6 − 5 500 µA

notes 3, 4 and 5

notes 3, 4 and 5

OTHER VCC (V)

CC

2.7 to 3.6 2.0 −−

2.7 to 3.6 −−0.8

IL

IO= −12 mA 2.7 VCC− 0.5 −−V
I

=−100 µA 3.0 VCC− 0.2 V

O

I

= −18 mA 3.0 VCC− 0.6 −−

O

I

=−24 mA 3.0 VCC− 0.8 −−

O

IL

IO=12mA 2.7 −−0.40 V
I

= 100 µA 3.0 −−0.20

O

I

=24mA 3.0 −−0.55

O

3.6 −±0.1 ±5 µA

3.6 − 0.1 ±5 µA

3.0 75 −−µA

3.0 −75 −−µA

74LVC32244A;

74LVCH32244A

(°C)

amb

−40 to +85

MIN. TYP.

(1)

MAX.

−−V

−

CC

UNIT

Notes

1. All typical values are at V

= 3.3 V and T

CC

amb

=25°C.

2. For bus hold parts the bus hold circuit is switched off when VIexceeds VCC allowing 5.5 V on the input terminal.

3. Valid for data inputs of bus hold parts only (LVCH32xxx-A).

4. For data inputs only. Control inputs do not have a bus hold circuit.

5. The specified sustaining current at the data input holds the input below the specified VIlevel.

6. The specified overdrive current at the data input forces the data input to the opposite logic input level.

1999 Aug 31 7

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

AC CHARACTERISTICS

Ground = 0 V; tr=tf≤2.5 ns; CL= 50 pF; RL= 500 Ω.

SYMBOL PARAMETER

t

PHL/tPLH

t

PZH/tPZL

t

PHZ/tPLZ

propagation delay
nAnto nY

n

3-state output enable time
nOE to nY

n

3-state output disable time
nOE to nY

n

Notes

1. All typical values are measured at V

AC WAVEFORMS

= 3.3 V and T

CC

TEST CONDITIONS T

WAVEFORMS VCC(V) MIN. TYP.

see Figs 4 and 6 2.7 1.5 − 5.5 ns

see Figs 5 and 6 2.7 1.5 − 6.5 ns

see Figs 5 and 6 2.7 1.5 − 6.2 ns

amb

=25°C.

74LVC32244A;

74LVCH32244A

= −40 to +85 °C

amb

(1)

3.0 to 3.6 1.5 3.0 4.5

3.0 to 3.6 1.5 3.5 5.5

3.0 to 3.6 1.5 3.7 5.2

MAX.

UNIT

handbook, halfpage

nA

INPUT

nY

OUTPUT

VM= 1.5 V at VCC≥ 2.7 V or
VM= 0.5 × VCCat VCC< 2.7 V.
VOL and VOH are typical output voltage drop that occur with the output load.

V

I

n

GND

t

V

OH

n

V

OL

PHL

V

M

Fig.4 Input nAn to output nYn propagation delay times.

t

PLH

V

M

MNA474

1999 Aug 31 8

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

GND

V

CC

V

OL

V

OH

GND

V

I

V

M

t

PLZ

t

PHZ

outputs

enabled

handbook, full pagewidth

nOE INPUT

OUTPUT
LOW-to-OFF
OFF-to-LOW

OUTPUT
HIGH-to-OFF
OFF-to-HIGH

VM= 1.5 V at VCC≥ 2.7 V or
VM= 0.5 × VCCat VCC< 2.7 V;
VX=VOL+ 0.3 V at VCC≥ 2.7 V or
VX=VOL+ 0.1 V at VCC< 2.7 V;
VY=VOH− 0.3VatVCC≥ 2.7 V or
VY=VOH− 0.1VatVCC< 2.7 V.
VOLand VOHare typical output voltage drop that occur with the output load.

74LVC32244A;

74LVCH32244A

t

PZL

V

M

V

X

t

PZH

V

Y

V

M

outputs

disabled

outputs
enabled

MNA478

handbook, full pagewidth

TEST S

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

open
2 × V
GND

CC

Fig.5 3-state enable and disable times.

S

2 × V

1

V

CC

V

CC

I

CC

R

V

D.U.T.

T

I

PULSE

GENERATOR

1

V

< 2.7 V V

2.7 to 3.6 V 2.7 V

V

O

C
50 pF

Definitions for test circuit:
RL= load resistor.
CL= load capacitance including jig and probe capacitance.
RT= termination resistanceshould beequal to theoutput impedance

of the pulse generator.

Z

o

R

L

500 Ω

R

L

L

500 Ω

open
GND

MNA479

CC

Fig.6 Load circuitry for switching times.

1999 Aug 31 9

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

74LVC32244A;

74LVCH32244A

PACKAGE OUTLINE

LFBGA96: plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm

D

ball A1
index area

A

2

E

detail X

A

A

1

SOT536-1

b

e

T
R
P
N

M

L
K

J
H

G

F
E
D
C
B
A

246135

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm

max.

1.5

A

1bA2

0.41

0.31

1.2

0.9

0.51

0.41

5.6

5.4

D

13.6

13.4

∅ w

M

Z

D

Z

E

e

ye

0.1

Z

0.93

0.58

E

0.8

w

0.2v0.15

vA

Z

D

E

0.93

0.58

A

y

X

0 5 10 mm

scale

OUTLINE

VERSION

SOT536-1

IEC JEDEC EIAJ

REFERENCES

1999 Aug 31 10

EUROPEAN

PROJECTION

ISSUE DATE

98-11-25
99-06-03

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

SOLDERING
Introduction to soldering surface mount packages

Thistextgives a very brief insight toacomplextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board byscreenprinting, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating,soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

74LVC32244A;

74LVCH32244A

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswith leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement andbefore soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 Aug 31 11

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

BGA, LFBGA, SQFP, TFBGA not suitable suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

, SO, SOJ suitable suitable

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

The package footprint must incorporate solder thieves downstream and at the side corners.

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

WAVE REFLOW

(2)

SOLDERING METHOD

suitable

(3)(4)
(5)

suitable
suitable

74LVC32244A;

74LVCH32244A

(1)

.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1999 Aug 31 12

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

NOTES

74LVC32244A;

74LVCH32244A

1999 Aug 31 13

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

NOTES

74LVC32244A;

74LVCH32244A

1999 Aug 31 14

Philips Semiconductors Product specification

32-bit buffer/line driver; 5 V input/output
tolerant; 3-state

NOTES

74LVC32244A;

74LVCH32244A

1999 Aug 31 15

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Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. [phone], Fax. [phone]

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

1999

Internet: http://www.semiconductors.philips.com

67

Printed in The Netherlands 245004/01/pp16 Date of release: 1999 Aug 31 Document order number: 9397 750 06258