Datasheet 74LVC273PW, 74LVC273DB, 74LVC273D Datasheet (Philips)

INTEGRATED CIRCUITS

74LVC273

Octal D-type flip-flop with reset;
positive-edge trigger

Product specification
Supersedes data of 1996 Jun 06
IC24 Data Handbook




1998 May 20

Philips Semiconductors Product specification

f

Maximum clock frequency

230

MHz

74L VC273Octal D-type flip-flop with reset; positive-edge trigger

FEA TURES

•Wide supply voltage range of 1.2V to 3.6V

•Conforms to JEDEC standard 8-1A

•Inputs accept voltages up to 5.5V

•CMOS low power consumption

•Direct interface with TTL levels

•Output drive capability 50Ω transmission lines @ 85°C

QUICK REFERENCE DATA

GND = 0V; T

SYMBOL

t

PHL/tPLH

max

C

I

C

PD

NOTE:

is used to determine the dynamic power dissipation (PD in µW)

1C

PD

= CPD  V

P

D

= input frequency in MHz; CL = output load capacity in pF;

f

i

f

= output frequency in MHz; VCC = supply voltage in V;

o

 (C

= 25°C; tr =tf 2.5 ns

amb

CC

2

 V

L

 fo) = sum of the outputs.

CC

PARAMETER CONDITIONS TYPICAL UNIT

Propagation delay
CP to Qn;

to Q

MR

n

Input capacitance 5.0 pF
Power dissipation

capacitance per flip-flop

2

x fi  (CL  V

2

 fo) where:

CC

DESCRIPTION

The 74LVC273 is a low-voltage Si-gate CMOS device, superior to
most advanced CMOS compatible TTL families.

The 74LVC273 has eight edge-triggered , D-type flip-flops with
individual D inputs and Q outputs. The common clock (CP) and
master reset (MR
simultaneously . The state of each D input, one set-up time before
the LOW-to-HIGH clock transition, is transferred to the
corresponding output (Qn) of the flip-flop.

All outputs will be forced LOW independently of clock or data inputs
by a LOW voltage level on the MR

The device is useful for applications where the true output only is
required and the clock and master reset are common to all storage
elements.

CL = 50pF
VCC = 3.3V

VI = GND to V

CC

) inputs load and reset (clear) all flip-flops

input.

6.0

6.0

1

22 pF

ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

20-Pin Plastic SO –40°C to +85°C 74LVC273 D 74LVC273 D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74LVC273 DB 74LVC273 DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC273 PW 74LVC273PW DH SOT360-1

PIN CONFIGURATION

1
2

Q0

3

D0

4

D1

5

Q1

6

Q2

7

D2

8

D3

9

Q3

GND

20MR
19
18
17
16
15
14
13
12
1110

SY00051

V
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP

CC

PIN DESCRIPTION

PIN

NUMBER

1 MR Master reset input (active LOW)

2, 5, 6,

9, 12, 15,

16, 19

3, 4, 7,

8, 13, 14,

17, 18

10 GND Ground (0V)
11 CP
20 V

SYMBOL FUNCTION

Q0 – Q7 Flip-flop outputs

D0 – D7 Data inputs

Clock input (LOW-to-HIGH,
edge-triggered)

CC

Positive power supply

1998 May 20 853-2064 19419

2

Philips Semiconductors Product specification

SYMBOL

PARAMETER

CONDITIONS

UNIT

V

V

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

LOGIC SYMBOL

3
4
7
8
13
14
17
18

IEEE/IEC LOGIC SYMBOL

11

CP

D0
D1
D2
D3
D4
D5
D6
D7

MR

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

2
5
6

9
12
15
16
19

CP
MR

D0
D1
D2
D3
D4
D5
D6

11
1

3
4
7
8
13
14

17
18

C1

R

2

1D

5
6

9
12
15
16

19

SY00050

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7D7

FUNCTION TABLE

1

SY00052

OPERATING

MODES

Reset (clear) L X X L

Load ‘1’ H  h H
Load ‘0’ H  I L

H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the

HIGH-to-LOW CP transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the

HIGH-to-LOW CP transition
 = LOW-to-HIGH transition
X = Don’t care

INPUTS OUTPUT

MR CP Dn Q0 – Q7

RECOMMENDED OPERATING CONDITIONS

DC supply voltage (for max. speed performance) 2.7 3.6
DC supply voltage (for low-voltage applications) 1.2 3.6
DC Input voltage range 0 5.5 V

I

DC Input voltage range for I/Os 0 V
DC output voltage range 0 V

O

Operating free-air temperature range –40 +85 °C
Input rise and fall times

f

T

V

tr, t

CC

V

I/O

V

amb

VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V

LIMITS

MIN MAX

CC
CC

0
0

20
10

V
V

ns/V

1998 May 20

3

Philips Semiconductors Product specification

P

TOT

VIHHIGH level Input voltage

V

VILLOW level Input voltage

V

VOHHIGH level output voltage

IIInput leakage current

V

V

GND

"0.1

"5µA

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

ABSOLUTE MAXIMUM RATINGS

1

In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)

SYMBOL

V

CC

I

IK

V

I

I

OK

V

O

I

O

I

, I

GND

CC

T

stg

DC supply voltage –0.5 to +6.5 V
DC input diode current VI t0 –50 mA
DC input voltage Note 2 –0.5 to +5.5 V
DC output diode current V
DC output voltage Note 2 –0.5 to VCC +0.5 V
DC output source or sink current VO = 0 to V
DC VCC or GND current "100 mA
Storage temperature range –65 to +150 °C

PARAMETER CONDITIONS RATING UNIT

uVCC or VO t 0 "50 mA

O

CC

"50 mA

Power dissipation per package
– plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500
– plastic shrink mini-pack (SSOP and

TSSOP)

above +60°C derate linearly with 5.5 mW/K 500

mW

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions voltages are referenced to GND (ground = 0V)

LIMITS

SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT

MIN TYP1MAX

V

LOW level output voltage

OL

p

I

OZ

I

CC

∆I

3-State output OFF-state current VCC = 3.6V; VI = VIH or VIL; VO = VCC or GND 0.1 "10 µA
Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 10 µA
Additional quiescent supply current VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA

CC

NOTE:

1. All typical values are at V

p

p

p

= 3.3V and T

CC

amb

= 25°C.

VCC = 1.2V V
VCC = 2.7 to 3.6V 2.0
VCC = 1.2V GND
VCC = 2.7 to 3.6V 0.8
VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5
VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC*0.2 V
VCC = 3.0V; VI = VIH or V
VCC = 3.0V; VI = VIH or V

IO = –12mA VCC*0.6

IL;

IO = –24mA VCC*1.0

IL;

VCC = 2.7V; VI = VIH or VIL; IO = 12mA 0.40
VCC = 3.0V; VI = VIH or VIL; IO = 100µA 0.20
VCC = 3.0V; VI = VIH or V

;

= 3.6V;

CC

= 5.5V or

I

IO = 24mA 0.55

IL;

CC

CC

V

V

1998 May 20

4

Philips Semiconductors Product specification

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

AC CHARACTERISTICS

GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; T

SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V UNIT

t

PHL

t

PLH

t

PHL

t

f

t

W

t

W

rem

t

su

t

h

max

Propagation delay
CP to Qn

Propagation delay
MR to Qn

Clock pulse width
HIGH or LOW

Master reset pulse
width LOW

Removal time
MR to CP

Set-up time
Dn to CP

Hold time
Dn to CP

Maximum clock
pulse frequency

NOTE:

1. These typical values are at V

= 3.3V and T

CC

= –40°C to +85°C.

amb

= 25°C.

amb

LIMITS

MIN TYP1MAX MIN TYP MAX

1 6.0 10.2 6.6 11.2 ns

2 6.3 11.0 7.4 12.0 ns

1 4 1.2 5 1.8 ns

2 4 1.2 5 1.7 ns

2 2 –1.0 3 –1.0 ns

3 2 0.7 3 1.0 ns

3 0 –0.6 0 –0.9 ns

1 125 100 MHz

AC WAVEFORMS

VM = 1.5V at VCC  2.7V.
VM = 0.5 VCC at VCC  2.7V.
VOL and VOH are the typical output voltage drop that occur with the
output load.

1/f

t

t

PHL

MAX

w

V

M

t

w

V

M

t

PLH

SW00078

V

M

t

rem

V

M

SY00053

V

I

CP INPUT

GND

V

Qn OUTPUT

V

OH

OL

V

M

t

PHL

Waveform 1. Clock (CP) to output (Qn) propagation delays, the

clock pulse width and the maximum clock pulse frequency

V

CC

MR INPUT

GND
V

CC

CP INPUT

GND
V

OH

Qn OUTPUT

V

OL

V

M

Waveform 2. Master reset (MR) pulse width, the master reset to

output (Q

) propagation delays and the master reset to clock

n

(CP) removal time

V

I

CP
INPUT

GND

V

I

Dn
INPUT

GND

V

OH

Qn
OUTPUT

V

OL

NOTE: The shaded areas indicate when the input is permitted to change

V

M

t

su

t

h

V

M

V

M

for predictable output performance.

t

su

t

h

SW00079

Waveform 3. Data set-up and hold times for the data input (Dn)

1998 May 20

5

Philips Semiconductors Product specification

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

TEST CIRCUIT

t

PULSE

GENERATOR

V

CC

V

I

D.U.T.

R

T

Test Circuit for 3-State Outputs

S

1

V

S1

Open
GND

R

V

O

C

L

L

R

L

90%

NEGATIVE
PULSE

POSITIVE
PULSE

10%

V

M

10% 10%

t

THL

t

TLH

90% 90%

V

M

W

V

M

(tf)

(tr)t

V

M

t

W

VM = 1.5V

Input Pulse Definition

90%

10%

t

TLH

THL

(tr)

(tf)

V

I

0V

V

I

0V

Switch position

TEST S

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open

V

GND

DEFINITIONS

1

S1

V

CC

< 2.7V

2.7–3.6V

V

V

CC

2.7V

I

V

S1

2  V
2  V

CC
CC

Waveform 4. Load circuitry for switching times

RL = Load resistor; see AC CHARACTERISTICS for value.

C

= Load capacitance includes jig and probe capacitance: See AC

L

CHARACTERISTICS for value.

R

= Termination resistance should be equal to Z

T

of pulse generators.

OUT

SY00044

1998 May 20

6

Philips Semiconductors Product specification

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1998 May 20

7

Philips Semiconductors Product specification

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1

1998 May 20

8

Philips Semiconductors Product specification

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1

1998 May 20

9

Philips Semiconductors Product specification

74LVC273Octal D-type flip-flop with reset; positive-edge trigger

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.

LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409

Philips Semiconductors and Philips Electronics North America Corporation

register eligible circuits under the Semiconductor Chip Protection Act.

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

Telephone [phone]

print code Date of release: 05-96
Document order number: 9397-750-04505


