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INTEGRATED CIRCUITS
74LVC10A
Triple 3-input NAND gate
Product specification 1998 Apr 28
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Philips Semiconductors Product specification
Triple 3-input NAND gate
FEA TURES
•Wide supply voltage range of 1.2 V to 3.6 V
•In accordance with JEDEC standard no. 8-1A.
•Inputs accept voltages up to 5.5 V
•CMOS low power consumption
•Direct interface with TTL levels
•Output capability: standard
•I
category: SSI
CC
QUICK REFERENCE DATA
GND = 0 V; T
SYMBOL
t
NOTE:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
P
= CPD × V
D
= input frequency in MHz; CL = output load capacity in pF;
f
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
L
= 25°C; tr = tf 2.5 ns
amb
PHL/tPLH
C
I
C
PD
2
× fi (CL × V
CC
2
× V
× fo) = sum of the outputs.
CC
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay
nA, nB, nC to nY
Input capacitance 5.0 pF
Power dissipation capacitance per gate VI = GND to V
2
fo) where:
CC
74L VC10A
DESCRIPTION
The 74LVC10A is a high performance, low power, low voltage, Si
gate CMOS device and superior to most advanced CMOS
compatible TTL families.
The 74LVC10A provides the 3-input NAND function.
CL = 50 pF;
VCC = 3.3 V
CC
1
3.9 ns
26 pF
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
14-Pin Plastic SO –40°C to +85°C 74LVC10A D 74LVC10A D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +85°C 74LVC10A DB 74LVC10A DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +85°C 74LVC10A PW 74LVC10APW DH SOT402-1
PIN CONFIGURATION
1
1A
2
1B
3
2A
4
2B
5
2C
6
2Y
7
GND
14
13
12
11
10
9
8
SV00416
V
CC
1C
1Y
3C
3B
3A
3Y
LOGIC SYMBOL
1A131
1B2
1C
3
2B4
2C2A5
3A119
3B10
3C
121Y
2Y
3Y
SV00417
6
8
PIN DESCRIPTION
PIN
NUMBER
1, 3, 9 1A – 3A Data inputs
2, 4, 10 1B – 3B Data inputs
7 GND Ground (0 V)
12, 6, 8 1Y – 3Y Data outputs
13, 5, 11 1C – 3C Data inputs
14 V
SYMBOL NAME AND FUNCTION
CC
Positive supply voltage
1998 Apr 28 853-1973 19308
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Philips Semiconductors Product specification
SYMBOL
PARAMETER
CONDITIONS
UNIT
V
V
mW
Triple 3-input NAND gate
LOGIC SYMBOL (IEEE/IEC)
1
2
13
3
4
5
9
10
11
LOGIC DIAGRAM (ONE GATE)
A
B
C
RECOMMENDED OPERATING CONDITIONS
V
V
T
V
amb
tr, t
DC supply voltage (for max. speed performance) 2.7 3.6 V
CC
DC supply voltage (for low-voltage applications) 1.2 3.6 V
CC
DC input voltage range 0 5.5 V
I
Operating free-air temperature range –40 +85 °C
Input rise and fall times
f
&
&
&
12
6
8
SV00418
Y
SV00419
FUNCTION TABLE
INPUTS OUTPUTS
nA nB nC nY
L L L H
L L H H
L H L H
L H H H
H L L H
H L H H
H H L H
H H H L
NOTES:
H = HIGH voltage level
L = LOW voltage level
LIMITS
MIN MAX
VCC = 1.2 to 2.7V
VCC = 2.7 to 3.6V
0
0
74LVC10A
20
10
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
V
CC
I
IK
V
I
I
OK
DC supply voltage –0.5 to +6.5 V
DC input diode current VI 0 –50 mA
DC input voltage Note 2 –0.5 to +6.5 V
DC output diode current V
PARAMETER CONDITIONS RATING UNIT
VCC or VO 0 50 mA
O
DC output voltage; output HIGH or LOW Note 2 –0.5 to VCC +0.5
I
GND
I/O
I
T
stg
DC input voltage; output 3-State Note 2 –0.5 to 6.5
DC output source or sink current VO = 0 to V
O
, I
DC VCC or GND current 100 mA
CC
CC
50 mA
Storage temperature range –65 to +150 °C
Power dissipation per package
P
TOT
– plastic mini-pack (SO) above +70°C derate linearly with 8 mW/K 500
– plastic shrink mini-pack (SSOP and TSSOP) above +60°C derate linearly with 5.5 mW/K 500
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28
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Philips Semiconductors Product specification
VIHHIGH level Input voltage
V
VILLOW level Input voltage
V
VOHHIGH level output voltage
V
Triple 3-input NAND gate
74LVC10A
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. V oltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP1MAX
V
I
∆I
LOW level output voltage
OL
I
Input leakage current VCC = 3.6V; VI = 5.5V or GND "0.1 "5 µA
I
Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 10 µA
CC
Additional quiescent supply current per
CC
input pin
NOTE:
1. All typical values are at V
p
p
p
= 3.3V and T
CC
amb
VCC = 1.2V V
VCC = 2.7 to 3.6V 2.0
VCC = 1.2V GND
VCC = 2.7 to 3.6V 0.8
VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5
VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC*0.2 V
VCC = 3.0V; VI = VIH or V
VCC = 3.0V; VI = VIH or V
IO = –12mA VCC*0.6
IL;
IO = –24mA VCC*1.0
IL;
VCC = 2.7V; VI = VIH or VIL; IO = 12mA 0.40
VCC = 3.0V; VI = VIH or VIL; IO = 100µA 0.20
VCC = 3.0V; VI = VIH or V
IO = 24mA 0.55
IL;
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA
= 25°C.
CC
CC
V
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF
SYMBOL PARAMETER WAVEFORM
t
PHL
t
PLH
/
Propagation delay
nA, nB, nC to nY
Figures 1, 2 1.5 3.9 5.7 1.5 6.7 ns
NOTE:
1. These typical values are at V
= 3.3V and T
CC
amb
= 25°C.
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V
V
= 0.5 VCC at VCC < 2.7 V
M
and VOH are the typical output voltage drop that occur with the
V
OL
output load.
V
INPUT
V
OH
V
I
GND
OL
propagation delays.
V
M
t
PHL
V
M
t
PLH
SV00420
nA, nB, nC
nY OUTPUT
Figure 1. Input (nA, nB, nC) to output (nY)
LIMITS
VCC = 3.3V ±0.3V VCC = 2.7V
MIN TYP
1
MAX MIN MAX
TEST CIRCUIT
V
PULSE
GENERATOR
SWITCH POSITION
TEST S
t
PLH/tPHL
I
Open
D.U.T.
R
T
1
V
CC
V
CC
< 2.7V V
UNIT
S
1
2 * V
CC
Open
GND
50pF
I
500Ω
500Ω
V
O
C
L
V
CC
2.7V2.7–3.6V
1998 Apr 28
SV00903
Figure 2. Load circuitry for switching times.
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Philips Semiconductors Product specification
74LVC10ATriple 3-input NAND gate
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
1998 Apr 28
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Philips Semiconductors Product specification
74LVC10ATriple 3-input NAND gate
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
1998 Apr 28
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Philips Semiconductors Product specification
74LVC10ATriple 3-input NAND gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
1998 Apr 28
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Philips Semiconductors Product specification
74LVC10ATriple 3-input NAND gate
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 07-98
Document order number: 9397-750-04482
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