Datasheet 74LVC06A Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

74LVC06A

Hex inverter with open-drain
outputs

Product specification
File under Integrated Circuits, IC24

2000 Mar 07

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

FEATURES

• 5 V tolerant inputs and outputs (open drain) for
interfacing with 5 V logic

• Wide supply voltage range from 1.65 to 5.5 V

• CMOS low power consumption

• Direct interface with TTL levels

DESCRIPTION

The 74LVC06A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3 or 5 V devices. This
feature allows the use ofthese devices as translators in a
mixed 3.3 to 5 V environment.

• Inputs accept voltages up to 5 V

• Complies with JEDEC standard no. 8-1A.

The 74LVC06A provides six inverting buffers.
The outputs of the 74LVC06A devices are open drain and

can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH
wired-AND functions.

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf≤2.5 ns.

amb

SYMBOL PARAMETER CONDITIONS TYP. UNIT

t

PLZ/tPZL

C

I

C

PD

propagation delay nA to nY CL= 50 pF; VCC= 3.3 V 2.3 ns
input capacitance 5.0 pF
power dissipation capacitance per gate VI= GND to VCC; note 1 8.0 pF

Note

1. C

is used to determine the dynamic power dissipation (PDin µW).

PD

PD=CPD× V

2

× fi+ Σ(CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;

= supply voltage in Volts;

V

CC

Σ(CL× V

2

× fo) = sum of the outputs.

CC

FUNCTION TABLE

See note 1.

INPUT OUTPUT

nA nY

LZ

HL

Note

1. H = HIGH voltage level;

L = LOW voltage level;
Z = high impedance OFF-state.

2000 Mar 07 2

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

ORDERING INFORMATION

TYPE NUMBER

PACKAGES

TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE

74LVC06AD −40 to +85 °C 14 SO plastic SOT108-1
74LVC06APW 14 TSSOP plastic SOT402-1

PINNING

PIN SYMBOL DESCRIPTION

1, 3, 5, 9, 11 and 13 1A to 6A data inputs
2, 4, 6, 8, 10 and 12 1Y to 6Y data outputs
7 GND ground (0 V)
14 V

handbook, halfpage

1A
1Y
2A
2Y
3A
3Y

GND

1
2
3
4

06

5
6
7

CC

MNA524

14

V

CC

13

6A

12

6Y

11

5A

10

5Y

9

4A

8

4Y

DC supply voltage

handbook, halfpage

211A 1Y

432A 2Y

653A 3Y

894A 4Y

1011 5A 5Y

1213 6A 6Y

Fig.1 Pin configuration.

2000 Mar 07 3

MNA525

Fig.2 Logic symbol.

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

handbook, halfpage

1A

2A

3A

4A

5A

6A

1

3

5

9

11

13

1

1

1

1

1

1

MNA526

Fig.3 IEC logic symbol.

2

1Y

4

2Y

6

3Y

8

4Y

10

5Y

12

6Y

handbook, halfpage

A

MNA527

Y

GND

Fig.4 Logic diagram (one gate).

2000 Mar 07 4

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS

UNIT

MIN. MAX.

LIMITS

V

CC

V

I

V

O

DC supply voltage 1.65 5.5 V
DC input voltage 0 5.5 V
DC output voltage active mode 0 V

CC

V

high-impedance mode 0 5.5 V

T

amb

t

r,tf

operating ambient temperature −40 +85 °C
input rise and fall ratios VCC= 1.65 to 2.7 V 0 20 ns/V

V

= 2.7 to 5.5 V 0 10 ns/V

CC

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

I

IK

V

I

I

OK

V

O

I

O

, I

I

CC

GND

T

stg

P

tot

DC supply voltage −0.5 +6.5 V
DC input diode current VI<0 −−50 mA
DC input voltage note 1 −0.5 +6.5 V
DC output clamping diode current VO<0 −−50 mA
DC output voltage active mode; note 1 −0.5 VCC+ 0.5 V

high-impedance mode;
note 1

DC output sink current VO= 0 to V

CC

−0.5

− 50 mA

+6.5 V

DC VCC or GND current −±100 mA
storage temperature −65 +150 °C
power dissipation per package

SO package above 70 °C derate linearly

− 500 mW

with 8 mW/K

TSSOP package above 60 °C derate linearly

− 500 mW

with 5.5 mW/K

Note

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2000 Mar 07 5

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

DC CHARACTERISTICS

Over recommended operating conditions; voltages are referenced to GND (ground=0V).

SYMBOL PARAMETER

V

IH

V

IL

V

OL

HIGH-level input voltage 1.65 to 1.95 V

LOW-level input voltage 1.65 to 1.95 −−GND V

LOW-level output
voltage

I

I

I

OZ

input leakage current VI= 5.5 Vor GND 3.6 −±0.1 ±5 µA
3-stateoutputOFF-state

current

I

off

power-off leakage
current

I

∆I

CC

CC

quiescent supply current VI=VCCor GND;

additional quiescent
supply current per input
pin

TEST CONDITIONS T

OTHER VCC(V)

MIN. TYP.

CC

(°C)

amb

−40 to +85

(1)

MAX.

UNIT

−− V

2.3 to 2.7 1.7 −− V

2.7 to 3.6 2.0 −− V

4.5 to 5.5 0.7 × V

−− V

CC

2.3 to 2.7 −−0.7 V

2.7 to 3.6 −−0.8 V

VI=VIHor V

4.5 to 5.5 −−0.30 × V

IL

CC

V

IO= 100 µA 1.65 to 5.5 −−0.20 V
I

= 4 mA 1.65 −−0.45 V

O

I

= 8 mA 2.3 −−0.3 V

O

I

= 12 mA 2.7 −−0.4 V

O

I

= 24 mA 3.0 −−0.55 V

O

I

= 32 mA 4.5 −−0.55 V

O

VI=VIHor VIL;

3.6 − 0.1 ±10 µA

VO= 5.5 Vor GND
VIor VO= 6.5 V 0.0 −±0.1 ±10 µA

5.5 − 0.1 10 µA

IO=0
VI=VCC− 0.6 V;

2.3 to 5.5 − 5 500 µA

IO=0

Note

1. All typical values are at V

= 3.3 V and T

CC

amb

=25°C.

2000 Mar 07 6

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

AC CHARACTERISTICS

GND = 0 V; VCC≤ 2.7 V and tr=tf≤2 ns; VCC≥ 2.7 V and tr=tf≤2.5 ns.

SYMBOL PARAMETER

t

PLZ/tPZL

propagation delay nA to nY see Figs 5 and 6 1.65 to 1.95 − 2.9 − ns

Note

1. All typical values are measured at T

AC WAVEFORMS

handbook, full pagewidth

nA input

GND

V

nY output

V

TEST CONDITIONS T

amb

−40 to +85

WAVEFORMS V

CC

(V)

MIN. TYP.

2.3 to 2.7 0.5 1.8 3.1 ns

2.7 0.5 2.5 3.9 ns

3.0 to 3.6 0.5 2.3 3.7 ns

4.5 to 5.5 0.5 1.7 3.4 ns

=25°C and at VCCrespectively 1.8, 2.5, 2.7, 3.3 and 5.0 V.

amb

V

I

V

M

CC

OL

t

PLZ

V

X

t

PZL

V

M

MNA529

(°C)

(1)

UNIT

MAX.

V

CC

<2.7 V 0.5 × V
≥2.7 to 3.6 V 1.5 V V
≥4.5 to 5.5 V 0.5 × V

V

M

CC

CC

V

X

VOL+ 0.15 V

+ 0.3 V

OL

VOL+ 0.3 V

Fig.5 The input nA to output nY propagation delays.

2000 Mar 07 7

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

handbook, full pagewidth

V

I

R

T

C

L

30 pF 1 kΩ
30 pF 500 Ω

V

CC

1.65 to 1.95 V 2 × V

2.3 to 2.7 V 2 × V

PULSE

GENERATOR

MNA530

V

ext

CC
CC

V

I

V

CC

V

CC

2.7 V 6 V 2.7 V 50 pF 500 Ω

3.3 to 3.6 V 6 V 2.7 V 50 pF 500 Ω

4.5 to 5.5 V 2 × V

CC

V

CC

50 pF 500 Ω

Fig.6 Load circuitry for switching times.

V

CC

D.U.T.

V

ext

R

V

O

R

L

L

R

C

L

L

2000 Mar 07 8

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

PACKAGE OUTLINES

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

y

Z

14

pin 1 index

1

D

c

8

A

2

A

1

7

e

w M

b

p

E

H

E

detail X

A

X

v M

A

Q

(A )

L

p

L

A

3

θ

0 2.5 5 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE
VERSION

SOT108-1

A

max.

1.75

0.069

A

1

0.25

0.10

0.010

0.004

A2A

1.45

1.25

0.057

0.049

IEC JEDEC EIAJ

076E06 MS-012

0.25

0.01

b

3

p

0.49

0.25

0.36

0.19

0.019

0.0100

0.014

0.0075

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1)

cD

8.75

8.55

0.35

0.34

REFERENCES

4.0

3.8

0.16

0.15

1.27

0.050

2000 Mar 07 9

eHELLpQZywv θ

1.05

0.041

1.0

0.4

0.039

0.016

0.7

0.25

0.6

0.028

0.01 0.004

0.024

EUROPEAN

PROJECTION

0.25 0.1

0.01

6.2

5.8

0.244

0.228

(1)

0.7

0.3

0.028

0.012

ISSUE DATE

97-05-22
99-12-27

o

8

o

0

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

D

c

y

Z

14

pin 1 index

8

17

w M

b

e

p

A

2

A

1

E

H

E

L

detail X

SOT402-1

A

X

v M

A

Q

(A )

3

A

θ

L

p

0 2.5 5 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT A1A2A

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

A

max.

0.15

mm

1.10

OUTLINE
VERSION

SOT402-1 MO-153

0.05

0.95

0.80

IEC JEDEC EIAJ

0.25

b

3

p

0.30

0.19

0.2

0.1

(1)E(2) (1)

cD

5.1

4.5

4.3

0.65

4.9

REFERENCES

2000 Mar 07 10

eHELLpQZywv θ

6.6

6.2

0.75

0.50

0.4

0.3

EUROPEAN

PROJECTION

0.13 0.10.21.0

0.72

0.38

ISSUE DATE

95-04-04
99-12-27

o

8

o

0

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

SOLDERING
Introduction to soldering surface mount packages

Thistextgivesaverybriefinsighttoacomplextechnology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering isnot always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuitboardbyscreen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleadsonfoursides,thefootprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2000 Mar 07 11

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

WAVE REFLOW

(1)

BGA, LFBGA, SQFP, TFBGA not suitable suitable

SOLDERING METHOD

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC

, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

(2)

(3)(4)
(5)

suitable

suitable
suitable

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

2000 Mar 07 12

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

NOTES

2000 Mar 07 13

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

NOTES

2000 Mar 07 14

Philips Semiconductors Product specification

Hex inverter with open-drain outputs 74LVC06A

NOTES

2000 Mar 07 15

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2000

Internet: http://www.semiconductors.philips.com

69

Printed in The Netherlands 245004/01/pp16 Date of release:2000 Mar 07 Document order number: 9397 750 06736