Product specification
Supersedes data of 1997 Aug 11
IC24 Data Handbook
1998 Apr 28
Page 2
Philips SemiconductorsProduct specification
Data inputs
74L VC02AQuad 2-input NOR gate
FEA TURES
•Wide supply range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8-1A
•Inputs accept voltages up to 5.5V
•CMOS low power consumption
•Direct interface with TTL levels
DESCRIPTION
The 74LVC02A is a high performance, low-power, low-voltage,
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC02A provides the 2-input NOR function.
•5-volt tolerant inputs, for interfacing with 5-volt logic
QUICK REFERENCE DATA
GND = 0 V; T
SYMBOL
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
P
= CPD × V
D
fi = input frequency in MHz; CL = output load capacity in pF;
f
= output frequency in MHz; VCC = supply voltage in V;
o
(C
L
2. The condition is VI = GND to V
ORDERING INFORMATION
14-Pin Plastic SO–40°C to +85°C74LVC02A D74LVC02A DSOT108-1
14-Pin Plastic SSOP Type II–40°C to +85°C74LVC02A DB74LVC02A DBSOT337-1
14-Pin Plastic TSSOP Type I–40°C to +85°C74LVC02A PW74LVC02APW DHSOT402-1
= 25°C; tr = tf 2.5 ns
amb
PARAMETERCONDITIONSTYPICALUNIT
t
PHL
t
PLH
C
I
C
PD
CC
2
× V
× fo) = sum of the outputs.
CC
Propagation delay
nA, nB to nY
CL = 50 pF;
VCC = 3.3 V
2.8ns
Input capacitance5.0pF
Power dissipation capacitance per gateNotes 1 and 228pF
2
× fi (CL × V
CC
CC.
2
× fo) where:
PACKAGESTEMPERATURE RANGE OUTSIDE NORTH AMERICANORTH AMERICADWG NUMBER
PIN CONFIGURATION
1
1Y
2
1A
3
1B
4
2Y
5
2A
6
2B
7
GND
14
V
4Y
13
4B
12
4A
11
3Y
10
3B
9
3A8
SV00389
PIN DESCRIPTION
PIN
CC
NUMBER
1, 4, 10, 131Y – 4YData outputs
2, 5, 8, 111A – 4A
3, 6, 9, 121B – 4B
7GNDGround (0 V)
14V
SYMBOLNAME AND FUNCTION
p
CC
Positive supply voltage
1998 Apr 28853-2019 19310
2
Page 3
Philips SemiconductorsProduct specification
SYMBOL
PARAMETER
CONDITIONS
UNIT
74LVC02AQuad 2-input NOR gate
LOGIC SYMBOL
1A
2
1B
3
2A
5
2B
6
3A
8
3B
9
4A
11
4B
12
LOGIC SYMBOL (IEEE/IEC)
2
3
5
6
8
9
11
12
≥1
≥1
≥1
≥1
1Y
2Y
3Y
4Y
SV00390
SV00391
LOGIC DIAGRAM (ONE GATE)
1
4
10
13
FUNCTION TABLE
nAnBnY
1
NOTES:
4
10
13
H = HIGH voltage level
L = LOW voltage level
A
Y
B
SV00820
INPUTSOUTPUTS
LLH
LHL
HLL
HHL
RECOMMENDED OPERATING CONDITIONS
T
V
V
tr, t
CC
CC
V
V
amb
DC supply voltage (for max. speed performance)2.73.6V
DC supply voltage (for low-voltage applications)1.23.6V
DC Input voltage range05.5V
I
DC output voltage range0V
O
Operating ambient temperature range in free-air–40+85°C
Input rise and fall times
f
VCC = 1.2 to 2.7V
V
= 2.7 to 3.6V
CC
LIMITS
MINMAX
CC
0
0
20
10
V
ns/V
1998 Apr 28
3
Page 4
Philips SemiconductorsProduct specification
mW
VIHHIGH level Input voltage
V
VILLOW level Input voltage
V
VOHHIGH level output voltage
V
IIInput leakage current
V
V
GND
"0.1
"5
A
74LVC02AQuad 2-input NOR gate
ABSOLUTE MAXIMUM RATINGS
1
Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
, I
GND
CC
T
stg
DC supply voltage (for max. speed
performance)
DC input diode currentVI t0–50mA
DC input voltageNote 2–0.5 to +5.5V
DC output diode currentV
DC output voltageNote 2–0.5 to VCC + 0.5V
DC output source or sink currentVO = 0 to V
DC VCC or GND current
Storage temperature range–65 to +150°C
PARAMETERCONDITIONSRATINGUNIT
–0.5 to +6.5V
uVCC or VO t 0
O
CC
"50
"50
"100
mA
mA
mA
Power dissipation per package
P
TOT
– plastic mini-pack (SO)above +70°C derate linearly with 8 mW/K500
– plastic shrink mini-pack (SSOP and TSSOP)above +60°C derate linearly with 5.5 mW/K500
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOLPARAMETERTEST CONDITIONSTemp = -40°C to +85°CUNIT
MINTYP1MAX
V
LOW level output voltage
OL
p
I
CC
∆I
Quiescent supply currentVCC = 3.6V; VI = VCC or GND; IO = 00.110µA
Additional quiescent supply current
CC
per input pin
NOTES:
1. All typical values are at V
p
p
p
= 3.3V and T
CC
amb
VCC = 1.2VV
VCC = 2.7 to 3.6V2.0
VCC = 1.2VGND
VCC = 2.7 to 3.6V0.8
VCC = 2.7V; VI = VIH or VIL;IO = –12mAVCC*0.5
VCC = 3.0V; VI = VIH or VIL;IO = –100µAVCC*0.2V
VCC = 3.0V; VI = VIH or V
VCC = 3.0V; VI = VIH or V
= –18mAVCC*0.6
IL;IO
= –24mAVCC*0.8
IL;IO
VCC = 2.7V; VI = VIH or VIL;IO = 12mA0.40
VCC = 3.0V; VI = VIH or VIL;IO = 100µA0.20
VCC = 3.0V; VI = VIH or V
;
= 3.6V;
CC
= 5.5V or
I
= 24mA0.55
IL;IO
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 05500µA
= 25°C.
CC
CC
V
µ
1998 Apr 28
4
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Philips SemiconductorsProduct specification
74LVC02AQuad 2-input NOR gate
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF
LIMITS
SYMBOLPARAMETERWAVEFORM
t
PHL/tPLH
Propagation delay
nA, nB to nY
Figures 1, 21.52.84.61.53.25.611ns
NOTE:
1. These typical values are at V
= 3.3V and T
CC
amb
= 25°C.
VCC = 3.3V ±0.3VVCC = 2.7VVCC = 1.2V
MINTYP1MAXMINTYP1MAXTYP
UNIT
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V
VM = 0.5 VCC at VCC < 2.7 V
V
and VOH are the typical output voltage drop that occur with the
OL
output load.
V
I
nA, nB, INPUT
GND
V
OH
nY OUTPUT
V
OL
Waveform 1. Input (nA, nB) to output (nY) propagation delays.
V
M
t
PHL
V
M
t
PLH
SV00392
TEST CIRCUIT
V
CC
V
PULSE
GENERATOR
I
R
T
V
CC
t 2.7VV
2.7V – 3.6V2.7V
V
D.U.T.
I
CC
Waveform 2. Load circuitry for switching times.
V
O
C
L
t
PLH/tPHL
TestS
50pF
S
500Ω
500Ω
Open
1
1
2 < V
Open
GND
SY00077
CC
1998 Apr 28
5
Page 6
Philips SemiconductorsProduct specification
74LVC02AQuad 2-input NOR gate
SO14: plastic small outline package; 14 leads; body width 3.9 mmSOT108-1
1998 Apr 28
6
Page 7
Philips SemiconductorsProduct specification
74LVC02AQuad 2-input NOR gate
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mmSOT337-1
1998 Apr 28
7
Page 8
Philips SemiconductorsProduct specification
74LVC02AQuad 2-input NOR gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mmSOT402-1
1998 Apr 28
8
Page 9
Philips SemiconductorsProduct specification
74LVC02AQuad 2-input NOR gate
NOTES
1998 Apr 28
9
Page 10
Philips SemiconductorsProduct specification
74LVC02AQuad 2-input NOR gate
DEFINITIONS
Data Sheet IdentificationProduct StatusDefinition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print codeDate of release: 05-96
Document order number:9397-750-04477
yyyy mmm dd
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