Datasheet 74LV86PW, 74LV86N, 74LV86DB, 74LV86D Datasheet (Philips)

INTEGRATED CIRCUITS

74LV86

Quad 2-input EXCLUSIVE-OR gate

Product specification
Supersedes data of 1997 Feb 03
IC24 Data Handbook

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1998 Apr 20

Philips Semiconductors Product specification

74L V86Quad 2-input EXCLUSIVE-OR gate

FEA TURES

•Wide Operating voltage: 1.0 to 5.5 V

•Optimized for low voltage applications: 1.0 to 3.6 V

•Accepts TTL input levels between V

•Typical V

T

amb

•Typical V

T

amb

(output ground bounce) < 0.8 V at V

OLP

= 25°C

(output VOH undershoot) > 2 V at V

OHV

= 25°C

= 2.7 V and V

CC

CC

CC

CC

= 3.3 V,

= 3.3 V,

•Output capability: standard

•I

category: SSI

CC

QUICK REFERENCE DATA

GND = 0 V; T

= 25°C; tr = t

amb

SYMBOL

t

PHL/tPLH

C

I

C

PD

NOTE:

1. C

is used to determine the dynamic power dissipation (PD in µW)

PD

= CPD × V

P

D

f

= input frequency in MHz; CL = output load capacitance in pF;

i

= output frequency in MHz; VCC = supply voltage in V;

f

o

 (C

× V

L

2

× fi  (CL × V

CC

2

× fo) = sum of the outputs.

CC

≤ 2.5 ns

f

PARAMETER CONDITIONS TYPICAL UNIT

Propagation delay
nA, nB to nY

Input capacitance 3.5 pF
Power dissipation capacitance per gate VI = GND to V

2

 fo) where:

CC

= 3.6 V

DESCRIPTION

The 74LV86 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT86.

The 74LV86 provides the 2-input EXCLUSIVE-OR function.

CL = 15 pF;
VCC = 3.3 V

CC

1

11 ns

30 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #

14-Pin Plastic DIL –40°C to +125°C 74LV86 N 74LV86 N SOT27-1
14-Pin Plastic SO –40°C to +125°C 74LV86 D 74LV86 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C 74LV86 DB 74LV86 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C 74LV86 PW 74LV86PW DH SOT402-1

PIN CONFIGURATION

1

1A

2

1B

3

1Y

4

2A

5

2B

6

2Y

GND

7

14
13
12

11

10

9
8

SV00481

V
4B
4A
4Y
3B
3A
3Y

CC

LOGIC SYMBOL (IEEE/IEC)

1
2

4
5

9

10

12
13

=1

=1

=1

=1

3

6

8

11

SV00479

1998 Apr 20 853–1892 19255

2

Philips Semiconductors Product specification

Quad 2-input EXCLUSIVE-OR gate

PIN DESCRIPTION

PIN

NUMBER

1, 4, 9, 12 1A – 4A Data inputs

2, 5, 10, 13 1B – 4B Data inputs

3, 6, 8, 11 1Y – 4Y Data outputs

7 GND Ground (0 V)

14 V

LOGIC SYMBOL

SYMBOL FUNCTION

Positive supply voltage

CC

1A

1

1B

2

2A

4

2B

5

3A

9

3B

10

4A

12

4B

13

1Y

2Y

3Y

4Y

SV00480

3

6

8

11

74LV86

FUNCTION TABLE

INPUTS OUTPUTS

nA nB nY

L L L

L H H
H L H
H H L

NOTES:

H = HIGH voltage level
L =LOW voltage level

LOGIC DIAGRAM (ONE GATE)

A

Y

B

SV00478

RECOMMENDED OPERA TING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT

V

V

V

T

amb

tr, t

NOTE:

1. The LV is guaranteed to function down to V
V

CC

ABSOLUTE MAXIMUM RATINGS

In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).

SYMBOL

V

I

I

I

I

I

T

P

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC supply voltage See Note 1 1.0 3.3 5.5 V

CC

Input voltage 0 V

I

Output voltage 0 V

O

Operating ambient temperature range in free air

See DC and AC

characteristics

–40
–40

VCC = 1.0V to 2.0 V

Input rise and fall times

f

= 1.2V to VCC = 5.5 V.

= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from

CC

VCC = 2.0V to 2.7 V
V

= 2.7V to 3.6 V

CC

VCC = 3.6V to 5.5 V

1, 2

PARAMETER CONDITIONS RATING UNIT

CC

GND

stg

TOT

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA

IK

DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA

OK

DC output source or sink current

O

– standard outputs
DC VCC or GND current for types with

,

– standard outputs 50

CC

–0.5V < VO < VCC + 0.5V

25

Storage temperature range –65 to +150 °C
Power dissipation per package

– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)

for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K

750
500
400

CC
CC

+85

+125

500
200
100

50

°C

ns/V

mA

mA

mW

V
V

1998 Apr 20

3

Philips Semiconductors Product specification

V

V

V

V

HIGH l

t

voltage all out uts

V

g

V

LOW l

t

voltage all out uts

V

g

V

CONDITION

P

nA, nB to nY

Quad 2-input EXCLUSIVE-OR gate

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions. V oltages are referenced to GND (ground = 0 V).

SYMBOL P ARAMETER TEST CONDITIONS

VCC = 1.2 V 0.9 0.9

IH

HIGH level Input
voltage

VCC = 2.0 V 1.4 1.4
VCC = 2.7 to 3.6 V 2.0 2.0
VCC = 4.5 to 5.5 V 0.7V
VCC = 1.2 V 0.3 0.3

IL

LOW level Input
voltage

VCC = 2.0 V 0.6 0.6
VCC = 2.7 to 3.6 V 0.8 0.8
VCC = 4.5 to 5.5 0.3V
VCC = 1.2 V; VI = VIH or V
VCC = 2.0 V; VI = VIH or V

V

OH

evel outpu

;

VCC = 2.7 V; VI = VIH or V

p

VCC = 3.0 V; VI = VIH or V
VCC = 4.5 V; VI = VIH or V

OH

HIGH level output
voltage;
STANDARD
outputs

VCC = 3.0 V; VI = VIH or V

VCC = 4.5 V; VI = VIH or V
VCC = 1.2 V; VI = VIH or V

VCC = 2.0 V; VI = VIH or V

V

OL

evel outpu

;

VCC = 2.7 V; VI = VIH or V

p

VCC = 3.0 V; VI = VIH or V
VCC = 4.5 V; VI = VIH or V

LOW level output
voltage;

OL

STANDARD
outputs

Input leakage

I

I

current

CC

Quiescent supply
current; SSI

I

VCC = 3.0 V; VI = VIH or V

VCC = 4.5 V; VI = VIH or V

VCC = 5.5 V; VI = VCC or GND 1.0 1.0 µA

VCC = 5.5V; VI = VCC or GND; IO = 0 20.0 40 µA

IL;
IL;
IL;
IL;
IL;

IL;

IL;

IL;
IL;
IL;
IL;
IL;

IL;

IL;

Additional

CC

quiescent supply
current per input

VCC = 2.7 V to 3.6 V; VI = VCC –0.6 V 500 850 µA

∆I

NOTE:

1. All typical values are measured at T

amb

= 25°C.

–IO = 100µA 1.2
–IO = 100µA 1.8 2.0 1.8
–IO = 100µA 2.5 2.7 2.5
–IO = 100µA 2.8 3.0 2.8
–IO = 100µA 4.3 4.5 4.3

–IO = 6mA 2.40 2.82 2.20

–IO = 12mA 3.60 4.20 3.50
IO = 100µA 0

IO = 100µA 0 0.2 0.2
IO = 100µA 0 0.2 0.2
IO = 100µA 0 0.2 0.2
IO = 100µA 0 0.2 0.2

IO = 6mA 0.25 0.40 0.50

IO = 12mA 0.35 0.55 0.65

-40°C to +85°C -40°C to +125°C

MIN TYP

CC

LIMITS

1

MAX MIN MAX

0.7V

CC

CC

74LV86

0.3V

CC

UNIT

V

V

AC CHARACTERISTICS

GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ

SYMBOL PARAMETER WAVEFORM

t

PHL/tPLH

NOTES:

1. Unless otherwise stated, all typical values are measured at T

2. Typical values are measured at V

1998 Apr 20

LIMITS

–40 to +85 °C –40 to +125 °C

VCC(V) MIN TYP

1

MAX MIN MAX

UNIT

1.2 70

2.0 24 32 41

ropagation delay

Figure 1

2.7 18 24 30

3.0 to 3.6 13

2

19 24

ns

4.5 to 5.5 16 20

= 25°C.

= 3.3 V.

CC

amb

4

Philips Semiconductors Product specification

Quad 2-input EXCLUSIVE-OR gate

AC WAVEFORMS

VM = 1.5 V at VCC ≥ 2.7 V a n d ≤ 3.6 V;

= 0.5 × VCC at VCC < 2.7 V a n d ≥ 4.5 V;

V

M

V

and VOH are the typical output voltage drop that occur with the

OL

output load.

V

I

nA, nB INPUT

GND

V

OH

nY OUTPUT

V

OL

Figure 1. Input (nA, nB) to output (nY) propagation delays

and the output transition times.

V

M

t

PHL

V

M

t

PLH

SV00477

TEST CIRCUIT

V

cc

V

PULSE

GENERATOR

DEFINITIONS

RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance
RT = Termination resistance should be equal to Z

TEST

t

PLH/tPHL

Figure 2. Load circuitry for switching times.

l

D.U.T.

R

T

Test Circuit for Outputs

V

CC

< 2.7V

2.7–3.6V
≥ 4.5 V V

V

V

2.7V

CC

CC

74LV86

V

O

50pF

C

L

of pulse generators.

OUT

I

RL= 1k

SV00902

1998 Apr 20

5

Philips Semiconductors Product specification

74LV86Quad 2-input EXCLUSIVE-OR gate

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

1998 Apr 20

6

Philips Semiconductors Product specification

74LV86Quad 2-input EXCLUSIVE-OR gate

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

1998 Apr 20

7

Philips Semiconductors Product specification

74LV86Quad 2-input EXCLUSIVE-OR gate

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1

1998 Apr 20

8

Philips Semiconductors Product specification

74LV86Quad 2-input EXCLUSIVE-OR gate

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

1998 Apr 20

9

Philips Semiconductors Product specification

74LV86Quad 2-input EXCLUSIVE-OR gate

Data sheet status

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

[1]

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

print code Date of release: 10-98
Document order number: 9397-750-04415

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