Datasheet 74LV273PW, 74LV273N, 74LV273D Datasheet (Philips)

INTEGRATED CIRCUITS

74LV273

Octal D-type flip-flop with reset; positive-edge trigger

Product specification Supersedes data of 1997 Apr 07 IC24 Data Handbook

 

1998 May 29

Philips Semiconductors Product specification

Octal D-type flip-flop with reset; positive edge-trigger

FEA TURES

•Wide operating voltage: 1.0 to 5.5V

•Optimized for Low Voltage applications: 1.0 to 3.6V

•Accepts TTL input levels between V

•Typical V

T

amb

•Typical V

T

amb

(output ground bounce)  0.8V @ VCC = 3.3V,

OLP

= 25°C

(output VOH undershoot)  2V @ VCC = 3.3V,

OHV

= 25°C

= 2.7V and VCC = 3.6V

CC

•Ideal buffer for MOS microprocessor or memory

•Common clock and master reset

•Output capability: standard

•I

category: MSI

CC

QUICK REFERENCE DATA

GND = 0V; T

SYMBOL

t

PHL/tPLH

f

max

C

I

C

PD

NOTES:

is used to determine the dynamic power dissipation (PD in µW)

1. C

PD

P

= CPD  V

D

= input frequency in MHz; CL = output load capacitance in pF;

f

i

f

= output frequency in MHz; VCC = supply voltage in V;

o

 (C

2. The condition is V

= 25°C; tr =tf 2.5 ns

amb

CC

2

 V

L

 fo) = sum of the outputs.

CC

PARAMETER CONDITIONS TYPICAL UNIT

Propagation delay CP to Q

n;

MR to Q

n

Maximum clock frequency 110 MHz Input capacitance 3.5 pF Power dissipation capacitance per flip-flop Notes 1 and 2 20 pF

2

x fi  (CL  V

= GND to V

I

CC

2

 fo) where:

CC

DESCRIPTION

The 74LV273 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT273.

The 74LV273 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR simultaneously . The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.

All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR

The device is useful for applications where the true output only is required and the clock and master reset are common to all storage elements.

CL = 15pF VCC = 3.3V

) inputs load and reset (clear) all flip-flops

input.

12 13

74L V273

ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #

20-Pin Plastic DIL –40°C to +125°C 74LV273 N 74LV273 N SOT146-1 20-Pin Plastic SO –40°C to +125°C 74LV273 D 74LV273 D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +125°C 74LV273 DB 74LV273 DB SOT339-1 20-Pin Plastic TSSOP –40°C to +125°C 74LV273 PW 74LV273PW DH SOT360-1

1998 May 29 853–1965 19466

2

Philips Semiconductors Product specification

Octal D-type flip-flop with reset; positive edge-trigger

PIN CONFIGURATION

1

MR

Q

2

0

3

D

0

4

D

1

5

Q

1

6

Q

2

7

D

2

8

D

3

9

Q

3

10 11

GND

V

20

CC

Q

19

7

18

D

7

17

D

6

16

Q

6

15

Q

5

14

D

5

13

D

4

12

Q

4

CP

LOGIC SYMBOL

74LV273

11

3 4 7 8 13 14 17 18

CP

MR

Q

0

Q

1

Q

2

Q

3

Q

4

Q

5

Q

6

Q

7

1

D

0

D

1

D

2

D

3

D

4

D

5

D

6

D

7

2 5 6

9 12 15 16 19

SV00366

PIN DESCRIPTION

NUMBER

1 MR Master reset input (active-LOW) 2, 5, 6, 9, 12,

15, 16, 19 3, 4, 7, 8, 13,

14, 17, 18 10 GND Ground (0V)

11 CP 20 V

SYMBOL FUNCTION

Q0 to Q

D0 to D

Flip-flop outputs

7

Data inputs

7

Clock input (LOW-to-HIGH, edgetriggered)

CC

Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

11

1

3 4

7 89 13 14 17 16 18

C1

R

1D

SV00367

2 5

6

12 15

19

SV00368

1998 May 29

3

Philips Semiconductors Product specification

OPERATING MODES

Octal D-type flip-flop with reset; positive edge-trigger

FUNCTIONAL DIAGRAM

3

D

0

4

D

1

D

76

2

8D

3

13 12

D

4

14 15

D

5

17 D

6

18 19D

7

1

MR

11

CP

FF0 FF7

2

Q

0

5

Q

1

Q

2

Q

9

3

to

Q

4

Q

5

16

Q

6

Q

7

FUNCTION TABLE

Reset (clear) L X X L

Load (‘1’) H ↑ h H Load (‘0’) H ↑ l L

H = HIGH voltage level h = HIGH voltage level one set-up time prior to the

LOW-to-HIGH CP transition L = LOW voltage level l = LOW voltage level one set-up time prior to the

LOW-to-HIGH CP transition ↑ = LOW–to–HIGH clock transition X = Don’t care

74LV273

INPUTS OUTPUTS

MR CP D

n

Q0 to Q

7

SV00369

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT

V

CC

V

T

amb

tr, t

NOTES:

1. The LV is guaranteed to function down to V

DC supply voltage See Note1 1.0 3.3 5.5 V Input voltage 0 – V

I

Output voltage 0 – V

O

Operating ambient temperature range in free air

Input rise and fall times

f

= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.

CC

See DC and AC characteristics

VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V

–40 –40

– – –

– – – –

CC CC

+85

+125

500 200 100

50

V V

°C

ns/V

1998 May 29

4

Philips Semiconductors Product specification

V

HIGH l

t

voltage all out uts

V

g

V

LOW l

t

voltage all out uts

V

g

V

Octal D-type flip-flop with reset; positive edge-trigger

ABSOLUTE MAXIMUM RATINGS

1, 2

74LV273

In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V)

SYMBOL

V

CC

±I

IK

±I

OK

±I

O

±I

GND

±I

CC

T

stg

P

TOT

DC supply voltage –0.5 to +7.0 V DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA DC output source or sink current

– standard outputs DC VCC or GND current for types with

,

–standard outputs 50 Storage temperature range –65 to +150 °C

Power dissipation per package –plastic DIL –plastic mini-pack (SO) –plastic shrink mini-pack (SSOP and TSSOP)

PARAMETER CONDITIONS RATING UNIT

–0.5V < VO < VCC + 0.5V

25

mA

for temperature range: –40 to +125°C above +70°C derate linearly with 12mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K

750 500 400

mW

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC CHARACTERISTICS FOR THE LV FAMILY

Over recommended operating conditions voltages are referenced to GND (ground = 0V)

SYMBOL P ARAMETER TEST CONDITIONS

MIN TYP

VCC = 1.2V 0.9 0.9

IH

IL

OH

OL

HIGH level Input voltage

LOW level Input voltage

evel outpu

;

HIGH level output voltage; STANDARD outputs

evel outpu

;

LOW level output voltage; STANDARD outputs

VCC = 2.0V 1.4 1.4 VCC = 2.7 to 3.6V 2.0 2.0 VCC = 4.5 to 5.5V 0.7*V

CC

VCC = 1.2V 0.3 0.3 VCC = 2.0V 0.6 0.6 VCC = 2.7 to 3.6V 0.8 0.8 VCC = 4.5 to 5.5 0.3*V VCC = 1.2V; VI = VIH or V VCC = 2.0V; VI = VIH or V VCC = 2.7V; VI = VIH or V

p

VCC = 3.0V; VI = VIH or V VCC = 4.5V;VI = VIH or V

VCC = 3.0V;VI = VIH or V

VCC = 4.5V;VI = VIH or V VCC = 1.2V; VI = VIH or V

VCC = 2.0V; VI = VIH or V VCC = 2.7V; VI = VIH or V

p

VCC = 3.0V;VI = VIH or V VCC = 4.5V;VI = VIH or V

VCC = 3.0V;VI = VIH or V

VCC = 4.5V;VI = VIH or V

–IO = 100µA 1.2

IL;

–IO = 100µA 1.8 2.0 1.8

IL;

–IO = 100µA 2.5 2.7 2.5

IL;

–IO = 100µA 2.8 3.0 2.8

IL;

–IO = 100µA 4.3 4.5 4.3

IL;

–IO = 6mA 2.40 2.82 2.20

IL;

–IO = 12mA 3.60 4.20 3.50

IL;

IO = 100µA 0

IL;

IO = 100µA 0 0.2 0.2

IL;

IO = 100µA 0 0.2 0.2

IL;

IO = 100µA 0 0.2 0.2

IL;

IO = 100µA 0 0.2 0.2

IL;

IO = 6mA 0.25 0.40 0.50

IL;

IO = 12mA 0.35 0.55 0.65

IL;

LIMITS

-40°C to +85°C -40°C to +125°C

1

MAX MIN MAX

0.7*V

CC

0.3*V

UNIT

CC

V

1998 May 29

5

Philips Semiconductors Product specification

SYMBOL

PARAMETER

TEST CONDITIONS

UNIT

P

CP to Q

n

P

MR to Q

n

Clock

idth

HIGH or LOW

Mast

width LOW

t

Figure 2

ns

t

Figure 3

ns

t

Figure 3

ns

Maxi

k

ulse frequency

Octal D-type flip-flop with reset; positive edge-trigger

DC CHARACTERISTICS FOR THE LV FAMILY (Continued)

Over recommended operating conditions voltages are referenced to GND (ground = 0V)

-40°C to +85°C -40°C to +125°C

Input leakage

I

current

CC

Quiescent supply current; MSI

I

Additional

CC

quiescent supply current per input

∆I

NOTE:

1. All typical values are measured at T

AC CHARACTERISTICS

GND = 0V; tr = tf = 2.5ns; CL = 50pF; RL = 1KΩ

SYMBOL

t

PHL/tPLH

t

PHL

t

W

t

W

rem

su

h

f

max

NOTE:

1. Unless otherwise stated, all typical values are at T

2. Typical value measured at V

3. Typical value measured at V

PARAMETER WAVEFORM

ropagation delay

pulse w

er reset pulse

Removal time MR to CP

Set-up time Dn to CP

Hold time Dn to CP

mum cloc

p

VCC = 5.5V; VI = VCC or GND 1.0 1.0 µA

VCC = 5.5V; VI = VCC or GND; IO = 0 20.0 160 µA

VCC = 2.7V to 3.6V; VI = VCC –0.6V 500 850 µA

= 25°C.

amb

CONDITION

VCC(V) MIN TYP1MAX MIN MAX

1.2 – 75 – – –

2.0 – 26 32 – 41

Figure 1

2.7 – 19 24 – 30

3.0 to 3.6 – 14

4.5 to 5.5 – – 16 – 20

1.2 – 80 – – –

2.0 – 27 44 – 56

Figure 2

2.7 – 20 33 – 41

3.0 to 3.6 – 15

4.5 to 5.5 – – 22 – 28

2.0 34 9 – 41 –

Figure 1

2.7 25 6 – 30 –

3.0 to 3.6 20 5

2.0 34 10 – 41 –

Figure 2

2.7 25 8 – 30 –

3.0 to 3.6 20 6

1.2 – –10 – – –

2.0 5 –4 – 5 –

2.7 5 –3 – 5 –

3.0 to 3.6 5 –2

1.2 – 20 – – –

2.0 22 7 – 26 –

2.7 16 5 – 19 –

3.0 to 3.6 13 4

1.2 – –10 – – –

2.0 5 –4 – 5 –

2.7 5 –3 – 5 –

3.0 to 3.6 5 –2

2.0 14 40 – 12 –

Figure 1

2.7 19 75 – 16 –

3.0 to 3.6 24 100

= 25°C.

= 3.3V.

CC

= 5.0V.

CC

amb

LIMITS

–40 to +85 °C

2

74LV273

LIMITS

–40 to +125 °C

19 – 24

26 – 33

– 24 –

– 5 –

– 15 –

– 5 –

– 20 –

UNIT

ns

MHz

1998 May 29

6

Philips Semiconductors Product specification

Octal D-type flip-flop with reset; positive edge-trigger

AC WAVEFORMS

VM = 1.5V at VCC  2.7V  3.6V V

= 0.5V * VCC at V

M

and V

V

OL

output load.

OH

CP INPUT

Qn OUTPUT

are the typical output voltage drop that occur with the

V

GND

V

OH

V

OL

 2.7V and  4.5V

CC

I

V

t

M

PHL

V

I

CP INPUT

GND

V

1/f

MAX

t

w

V

M

t

PLH

INPUT

D

n

GND

V

OH

Qn OUTPUT

V

OL

I

74LV273

V

M

t

su

t

h

V

M

V

M

t

su

t

h

SV00370

Figure 1. The clock (CP) to output (Qn) propagation delays, the

clock pulse width and the maximum clock pulse frequency

V

I

MR INPUT

GND V

I

CP INPUT

GND V

OH

Qn OUTPUT

V

OL

V

M

t

PHL

V

M

t

w

V

M

t

rem

V

M

SV00372

Figure 2. The master reset (MR) pulse width, the master reset

to output (Q

) propagations delay and the master reset to clock

n

(CP) removal time

SV00371

Figure 3. Data set-up and hold times for the data input (Dn)

NOTE:

The shaded areas indicate when the input is permitted to change for predictable output performance.

TEST CIRCUIT

V

cc

V

2.7V

CC

V

O

50pF

C

L

of pulse generators.

OUT

I

CC

RL= 1k

SV00902

V

PULSE

GENERATOR

l

D.U.T.

R

T

Test Circuit for Outputs

DEFINITIONS

RL = Load resistor CL = Load capacitance includes jig and probe capacitiance RT = Termination resistance should be equal to Z

TEST

t

PLH/tPHL

V

CC

< 2.7V

2.7–3.6V ≥ 4.5 V V

Figure 4. Load circuitry for switching times

1998 May 29

7

Philips Semiconductors Product specification

Octal D-type flip-flop with reset; positive edge-trigger

DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1

74LV273

1998 May 29

8

Philips Semiconductors Product specification

Octal D-type flip-flop with reset; positive edge-trigger

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

74LV273

1998 May 29

9

Philips Semiconductors Product specification

Octal D-type flip-flop with reset; positive edge-trigger

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1

74LV273

1998 May 29

10

Philips Semiconductors Product specification

Octal D-type flip-flop with reset; positive edge-trigger

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1

74LV273

1998 May 29

11

Philips Semiconductors Product specification

74LV273Octal D–type flip–flop with reset; positive edge–trigger

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

LIFE SUPPORT APPLICA TIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381

This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.

 Copyright Philips Electronics North America Corporation 1998

print code Date of release: 05-96 Document order number: 9397-750-04443

 

1997 Apr 07

12