Datasheet 74LV240PW, 74LV240N, 74LV240DB, 74LV240D Datasheet (Philips)

INTEGRATED CIRCUITS

74LV240

Octal buffer/line driver; inverting (3-State)

Product specification Supersedes data of 1997 Feb 19 IC24 Data Handbook

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1998 May 20

Philips Semiconductors Product specification

74L V240Octal buffer/line driver; inverting (3-State)

FEA TURES

•Wide operating voltage: 1.0 to 5.5 V

•Optimized for low voltage applications: 1.0 to 3.6 V

•Accepts TTL input levels between V

•Typical V

T

amb

•Typical V

T

amb

(output ground bounce) < 0.8 V at V

OLP

= 25°C

(output VOH undershoot) > 2 V at V

OHV

= 25°C

= 2.7 V and V

CC

= 3.3 V,

•Output capability: bus driver

•I

category: MSI

CC

QUICK REFERENCE DATA

GND = 0 V; T

= 25°C; tr = t

amb

SYMBOL

Propagation delay

t

PHL/tPLH

C

I

C

PD

1An to 1Yn; 2An to 2Y

Input capacitance 3.5 pF Power dissipation capacitance per buffer

NOTE:

1. C

is used to determine the dynamic power dissipation (PD in µW)

PD

= CPD  V

P

D

f

= input frequency in MHz; CL = output load capacitance in pF;

i

= output frequency in MHz; VCC = supply voltage in V;

f

o

 V

 (C

L

2

 fi  (CL  V

CC

2

 fo) = sum of the outputs.

CC

≤ 2.5 ns

f

PARAMETER CONDITIONS TYPICAL UNIT

n

2

 fo) where:

CC

= 3.6 V

CL = 15 pF; VCC = 3.3 V

VCC = 3.3 V VI = GND to V

DESCRIPTION

The 74LV240 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT240.

The 74LV240 is an octal inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE assume a high impedance OFF-state. The 74LV240 is identical to the 74LV244 but has inverting outputs.

CC

and 2OE. A HIGH on nOE causes the outputs to

9.0 ns

1

30 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #

20-Pin Plastic DIL –40°C to +125°C 74LV240 N 74LV240 N SOT146-1 20-Pin Plastic SO –40°C to +125°C 74LV240 D 74LV240 D SOT163-1 20-Pin Plastic SSOP Type II –40°C to +125°C 74LV240 DB 74LV240 DB SOT339-1 20-Pin Plastic TSSOP Type I –40°C to +125°C 74LV240 PW 74LV240PW DH SOT360-1

PIN CONFIGURATION

1

1OE

1A

2

0

3

2Y

0

4

1A

1

5

2Y

1

6

1A

2

7

2Y

2

8

1A

3

9

2Y

3

10

GND

20 19 18 17 16 15 14 13 12 11

SV00607

V 2OE 1Y 2A 1Y 2A 1Y 2A 1Y 2A

CC

0

1 1

2

3

LOGIC SYMBOL

1A

2

0

2A

17

0

1A

4

1

2A

15

1

1A

6

2

2A

13

2

1A

8

3

2A

11

3

1

1OE

19

2OE

1Y

18

0

2Y

0

1Y

16

1

2Y

1

1Y

14

2

2Y

2

1Y

12

3

2Y

3

SV00608

3

5

7

9

1998 May 20 853–1923 19422

2

Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

PIN DESCRIPTION

NUMBER

1 1OE Output enable input (active LOW) 2, 4, 6, 8 1A0 to 1A3Data inputs 3, 5, 7, 9 2Y0 to 2Y3Bus outputs 10 GND Ground (0 V) 17, 15, 13, 11 2A0 to 2A3Data inputs 18, 16, 14, 12 1Y0 to 1Y3Bus outputs 19 2OE Output enable input (active LOW) 20 V

SYMBOL FUNCTION

CC

Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

1

EN

2

4 6 8

19

EN

11

13 15 17

18

16 14 12

9

7 5 3

SV00611

FUNCTIONAL DIAGRAM

1A

2

0

1A

4

1

1A

6

2

1A

8

3

1OE

1

2A

17

0

2A

15

1

2A

13

2

2A

11

3

19

2OE

FUNCTION TABLE

INPUTS OUTPUT

nOE nA

L L H L H L

H X Z

NOTES:

H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state

n

1Y

0

1Y

1

1Y

2

1Y

3

2Y

0

2Y

1

2Y

2

2Y

3

SV00610

18

16

14

12

3

5

7

9

nY

n

1998 May 20

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Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT

V

T

amb

tr, t

NOTE:

1. The LV is guaranteed to function down to V V

CC

ABSOLUTE MAXIMUM RATINGS

In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V).

SYMBOL

V

I

DC supply voltage See Note 1 1.0 3.3 5.5 V

CC

Input voltage 0 – V

I

Output voltage 0 – V

O

Operating ambient temperature range in free air

Input rise and fall times

f

= 5.5V.

CC

See DC and AC

characteristics

VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V

= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to

–40 –40

– – – –

1, 2

PARAMETER CONDITIONS RATING UNIT

DC supply voltage –0.5 to +7.0 V

CC

DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA

IK

DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA

OK

DC output source or sink current

O

– bus driver outputs

–0.5V < VO < VCC + 0.5V 35 mA

CC CC

+85

+125

500 200 100

50

V V

°C

ns/V

I

P

GND

T

TOT

DC VCC or GND current for types with

,

– bus driver outputs

CC

Storage temperature range –65 to +150 °C

stg

Power dissipation per package – plastic DIL – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP)

for temperature range: –40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K

70 mA

750 500

mW

400

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

1998 May 20

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Philips Semiconductors Product specification

V

voltage all out uts

V

voltage; BUS driver

V

voltage all out uts

V

voltage; BUS driver

V

74LV240Octal buffer/line driver; inverting (3-State)

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions. V oltages are referenced to GND (ground = 0V).

LIMITS

SYMBOL P ARAMETER TEST CONDITIONS

VCC = 1.2V 0.9 0.9

IH

HIGH level Input voltage

VCC = 2.0V 1.4 1.4 VCC = 2.7 to 3.6V 2.0 2.0 VCC = 4.5 to 5.5V 0.7V VCC = 1.2V 0.3 0.3

IL

LOW level Input voltage

VCC = 2.0V 0.6 0.6 VCC = 2.7 to 3.6V 0.8 0.8 VCC = 4.5 to 5.5 0.3V VCC = 1.2V; VI = VIH or V VCC = 2.0V; VI = VIH or V

OH

HIGH level output

;

V

VCC = 2.7V; VI = VIH or V

p

VCC = 3.0V; VI = VIH or V VCC = 4.5V; VI = VIH or V

HIGH level output

OH

;

outputs VCC = 4.5V; VI = VIH or V

VCC = 3.0V; VI = VIH or V

VCC = 1.2V; VI = VIH or V VCC = 2.0V; VI = VIH or V

OL

LOW level output

;

V

VCC = 2.7V; VI = VIH or V

p

VCC = 3.0V; VI = VIH or V VCC = 4.5V; VI = VIH or V

LOW level output

OL

I

OZ

I

CC

;

outputs VCC = 4.5V; VI = VIH or V Input leakage

current 3-State output

OFF-state current Quiescent supply

current; MSI

VCC = 3.0V; VI = VIH or V

VCC = 5.5V; VI = VCC or GND 1.0 1.0 µA VCC = 5.5V; VI = VIH or V

VO = VCC or GND VCC = 5.5V; VI = VCC or GND; IO = 0 20.0 160 µA

IL; IL; IL; IL; IL;

IL;

IL; IL;

IL; IL; IL; IL;

IL;

Additional

CC

quiescent supply current per input

VCC = 2.7V to 3.6V; VI = VCC – 0.6V 500 850 µA

∆I

NOTE:

1. All typical values are measured at T

amb

= 25°C.

–IO = 100µA 1.2 –IO = 100µA 1.8 2.0 1.8 –IO = 100µA 2.5 2.7 2.5 –IO = 100µA 2.8 3.0 2.8 –IO = 100µA 4.3 4.5 4.3

–IO = 8mA 2.40 2.82 2.20 –IO = 16mA 3.60 4.20 3.50

IO = 100µA 0 IO = 100µA 0 0.2 0.2 IO = 100µA 0 0.2 0.2 IO = 100µA 0 0.2 0.2 IO = 100µA 0 0.2 0.2

IO = 8mA 0.20 0.40 0.50 IO = 16mA 0.35 0.55 0.65

-40°C to +85°C -40°C to +125°C

MIN TYP

CC

1

MAX MIN MAX

0.7V

CC

5 10 µA

0.3V

UNIT

CC

V

1998 May 20

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Philips Semiconductors Product specification

CONDITION

Pro agation delay

2A

2Y

3-State out ut enable time

2OE to 2Y

3-State out ut disable time

2OE to 2Y

74LV240Octal buffer/line driver; inverting (3-State)

AC CHARACTERISTICS

GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ

LIMITS

SYMBOL PARAMETER WAVEFORM

p

t

PHL/tPLH

t

PZH/tPZL

t

PHZ/tPLZ

1An to 1Yn;

to

n

-

1OE to 1Yn;

-

1OE to 1Yn;

Figures 1

p

Figures 2

n

p

Figures 2

n

NOTES:

1. Unless otherwise stated, all typical values are measured at T

2. Typical values are measured at V

= 3.3 V.

CC

VCC(V) MIN TYP1MAX MIN MAX

1.2 55

2.0 19 24 31

2.7 14 18 23

3.0 to 3.6 10

4.5 to 5.5 12 15

1.2 70

2.0 24 32 41

2.7 18 24 30

3.0 to 3.6 13

4.5 to 5.5 16 20

1.2 65

2.0 24 29 36

2.7 18 22 27

3.0 to 3.6 14

4.5 to 5.5 15 18

= 25°C

amb

–40 to +85 °C –40 to +125 °C

2

14 18

2

19 24

2

18 22

UNIT

ns

AC WAVEFORMS

VM = 1.5V at VCC ≥ 2.7V and ≤ 3.6V;

= 0.5V × VCC at VCC < 2.7V and ≥ 4.5V.

V

M

V

and VOH are the typical output voltage drop that occur with the

OL

output load. V

= VOL + 0.3V at VCC ≥ 2.7V and ≤ 3.6V

X

V

= VOL + 0.1V × V

X

= VOH – 0.3V at VCC ≥ 2.7V and ≤ 3.6V

V

Y

V

= VOH – 0.1 × VCC at VCC < 2.7V and ≥ 4.5V

Y

1An , 2An INPUT

GND

V

1Y

, 2Yn OUTPUT

n

V

Figure 1. Input (1An, 2An) to output (1Yn, 2Yn)

at V

CC

V

I

t

PHL

OH

OL

< 2.7V and 4.5V

CC

V

M

V

M

propagation delays.

t

PLH

SV00612

V

I

nOE INPUT

GND

V

Q

OUTPUT

n

LOW-to-OFF OFF-to-LOW

V

Qn OUTPUT

HIGH-to-OFF OFF-to-HIGH

GND

CC

OL

OH

V

outputs

enabled

M

t

PLZ

V

X

t

PHZ

V

Y

outputs

disabled

Figure 2. 3-State enable and disable times.

t

PZL

V

M

t

PZH

V

M

outputs

enabled

SV00613

1998 May 20

6

Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

TEST CIRCUIT

V

CC

PULSE

GENERATOR

V

I

D.U.T.

R

T

V

Test Circuit for Outputs

DEFINITIONS

RL = Load resistor

= Load capacitance includes jig and probe capacitiance.

C

L

RT = Termination resistance should be equal to Z

SWITCH POSITION

TEST

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Open

2 * V

GND

S

1

CC

V

CC

< 2.7V V

2.7–3.6V

 4.5V

O

C

L

of pulse generators.

OUT

V

I

CC

2.7V V

CC

50 pF

2 * V

Open GND

R

= 1k

L

R

= 1k

L

SV00896

CC

Figure 3. Load circuitry for switching times.

1998 May 20

7

Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1

1998 May 20

8

Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1998 May 20

9

Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1

1998 May 20

10

Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1

1998 May 20

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Philips Semiconductors Product specification

74LV240Octal buffer/line driver; inverting (3-State)

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

LIFE SUPPORT APPLICA TIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381

This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.

 Copyright Philips Electronics North America Corporation 1998

print code Date of release: 05-96 Document order number: 9397-750-04435

 

1998 May 20

12