Page 1
INTEGRATED CIRCUITS
74LV00
Quad 2-input NAND gate
Product specification
Supersedes data of 1998 Apr 13
IC24 Data Handbook
1998 Apr 20
Page 2
Philips Semiconductors Product specification
74L V00Quad 2-input NAND gate
FEA TURES
•Wide operating voltage: 1.0 to 5.5 V
•Optimized for low voltage applications: 1.0 to 3.6 V
•Accepts TTL input levels between V
•Typical V
T
amb
•Typical V
T
amb
(output ground bounce) < 0.8 V at V
OLP
= 25°C
(output VOH undershoot) > 2 V at V
OHV
= 25°C
= 2.7 V and V
CC
CC
CC
CC
= 3.3 V,
= 3.3 V,
•Output capability: standard
•I
category: SSI
CC
QUICK REFERENCE DATA
GND = 0 V; T
= 25°C; tr =t
amb
SYMBOL
t
PHL/tPLH
C
I
C
PD
NOTES:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
P
= CPD V
D
= input frequency in MHz; CL = output load capacitance in pF;
f
i
f
= output frequency in MHz; VCC = supply voltage in V;
o
V
(C
L
2. The condition is V
2
CC
2
fo) = sum of the outputs.
CC
I
≤ 2.5 ns
f
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay
nA, nB to nY
Input capacitance 3.5 pF
Power dissipation capacitance per gate See Notes 1 and 2 22 pF
fi (CL V
= GND to V
CC.
2
fo) where:
CC
= 3.6 V
DESCRIPTION
The 74LV00 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT00.
The 74LV00 provides the 2-input NAND function.
CL = 15 pF;
VCC = 3.3 V
7 ns
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +125°C 74LV00 N 74LV00 N SOT27-1
14-Pin Plastic SO –40°C to +125°C 74LV00 D 74LV00 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C 74LV00 DB 74LV00 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C 74LV00 PW 74LV00PW DH SOT402-1
PIN DESCRIPTION
PIN
NUMBER
1, 4, 9, 12 1A – 4A Data inputs
2, 5, 10, 13 1B – 4B Data inputs
3, 6, 8, 11 1Y – 4Y Data outputs
7 GND Ground (0 V)
14 V
SYMBOL FUNCTION
Positive supply voltage
CC
FUNCTION TABLE
INPUTS OUTPUTS
nA nB nY
L L H
L H H
H L H
H H L
NOTES:
H = HIGH voltage level
L =LOW voltage level
1998 Apr 20 853–1898 19257
2
Page 3
Philips Semiconductors Product specification
Quad 2-input NAND gate
PIN CONFIGURATION
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
GND
SY00034
LOGIC SYMBOL (IEEE/IEC)
1
2
4
5
9
10
12
13
&
&
&
&
SV00378
74LV00
LOGIC SYMBOL
1A
14
V
CC
13
4B
12
4A
11
4Y
3B
10
3A
9
87
3Y
LOGIC DIAGRAM (ONE GATE)
3
6
8
11
1
1B
2
2A
4
2B
5
3A
9
3B
10
4A
12
4B
13
A
B
1Y
2Y
3Y
4Y
SV00379
3
6
8
11
SY00035
Y
RECOMMENDED OPERA TING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT
V
V
V
T
amb
tr, t
NOTE:
1. The LV is guaranteed to function down to V
DC supply voltage See Note 1 1.0 3.3 5.5 V
CC
Input voltage 0 – V
I
Output voltage 0 – V
O
Operating ambient temperature range in free air
Input rise and fall times
f
CC
See DC and AC
characteristics
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
V
= 2.7V to 3.6V
CC
VCC = 3.6V to 5.5V
= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
–40
–40
–
–
–
–
–
–
–
–
CC
CC
+85
+125
500
200
100
50
ns/V
V
V
°C
1998 Apr 20
3
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Philips Semiconductors Product specification
V
V
V
V
HIGH l
t
voltage all out uts
V
g
V
LOW l
t
voltage all out uts
V
g
V
Quad 2-input NAND gate
ABSOLUTE MAXIMUM RATINGS
1, 2
74LV00
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
V
CC
±I
IK
±I
OK
±I
O
±I
GND
±I
CC
T
stg
P
TOT
DC supply voltage –0.5 to +7.0 V
DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
DC output source or sink current
– standard outputs
DC VCC or GND current for types with
,
– standard outputs 50
Storage temperature range –65 to +150 °C
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
PARAMETER CONDITIONS RATING UNIT
–0.5V < VO < VCC + 0.5V
25
mA
mA
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. V oltages are referenced to GND (ground = 0V).
SYMBOL P ARAMETER TEST CONDITIONS
VCC = 1.2V 0.9 0.9
IH
HIGH level Input
voltage
VCC = 2.0V 1.4 1.4
VCC = 2.7 to 3.6V 2.0 2.0
VCC = 4.5 to 5.5V 0.7*V
VCC = 1.2V 0.3 0.3
IL
LOW level Input
voltage
VCC = 2.0V 0.6 0.6
VCC = 2.7 to 3.6V 0.8 0.8
VCC = 4.5 to 5.5 0.3*V
VCC = 1.2V; VI = VIH or V
VCC = 2.0V; VI = VIH or V
V
OH
evel outpu
;
VCC = 2.7V; VI = VIH or V
p
VCC = 3.0V; VI = VIH or V
VCC = 4.5V; VI = VIH or V
OH
HIGH level output
voltage;
STANDARD
outputs
VCC = 3.0V; VI = VIH or V
VCC = 4.5V; VI = VIH or V
VCC = 1.2V; VI = VIH or V
VCC = 2.0V; VI = VIH or V
V
OL
evel outpu
;
VCC = 2.7V; VI = VIH or V
p
VCC = 3.0V; VI = VIH or V
VCC = 4.5V; VI = VIH or V
OL
LOW level output
voltage;
STANDARD
outputs
VCC = 3.0V; VI = VIH or V
VCC = 4.5V; VI = VIH or V
–IO = 100µA 1.2
IL;
–IO = 100µA 1.8 2.0 1.8
IL;
–IO = 100µA 2.5 2.7 2.5
IL;
–IO = 100µA 2.8 3.0 2.8
IL;
–IO = 100µA 4.3 4.5 4.3
IL;
–IO = 6mA 2.40 2.82 2.20
IL;
–IO = 12mA 3.60 4.20 3.50
IL;
IO = 100µA 0
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 6mA 0.25 0.40 0.50
IL;
IO = 12mA 0.35 0.55 0.65
IL;
-40°C to +85°C -40°C to +125°C
MIN TYP
CC
LIMITS
1
MAX MIN MAX
0.7*V
CC
CC
0.3*V
UNIT
CC
V
V
1998 Apr 20
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Philips Semiconductors Product specification
CONDITION
P
nA, nB to nY
Quad 2-input NAND gate
DC ELECTRICAL CHARACTERISTICS (Continued)
Over recommended operating conditions. V oltages are referenced to GND (ground = 0V).
SYMBOL P ARAMETER TEST CONDITIONS
Input leakage
I
I
current
CC
Quiescent supply
current; SSI
I
VCC = 5.5V; VI = VCC or GND 1.0 1.0 µA
VCC = 5.5V; VI = VCC or GND; IO = 0 20.0 40 µA
Additional
CC
quiescent supply
current
VCC = 2.7V to 3.6V; VI = VCC –0.6V 500 850 µA
∆I
NOTE:
1. All typical values are measured at T
amb
= 25°C.
AC CHARACTERISTICS
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
SYMBOL PARAMETER WAVEFORM
t
PHL/PLH
NOTES:
1. Unless otherwise stated, all typical values are measured at T
2. Typical values are measured at V
3. Typical values are measured at V
ropagation delay
Figures 1, 2
= 3.3 V.
CC
= 5.0 V.
CC
VCC(V) MIN TYP1MAX MIN MAX
1.2 45
2.0 15 26 31
2.7 11 18 23
3.0 to 3.6 9
4.5 to 5.5 6.5
= 25°C.
amb
-40°C to +85°C -40°C to +125°C
MIN TYP
74LV00
LIMITS
1
MAX MIN MAX
LIMITS
–40 to +85 °C –40 to +125 °C
2
15 18
3
11 14
UNIT
UNIT
ns
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V a n d ≤ 3.6 V;
= 0.5 × V
V
M
V
and VOH are the typical output voltage drop that occur with the
OL
output load.
nA, nB INPUT
nY OUTPUT
Figure 1. Input (nA, nB) to output (nY) propagation delays.
at VCC < 2.7 V a n d ≥ 4.5 V;
CC
V
I
V
M
GND
V
OH
V
OL
t
PHL t
V
M
SV00377
PLH
TEST CIRCUIT
V
cc
V
PULSE
GENERATOR
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitiance
RT = Termination resistance should be equal to Z
TEST
t
PLH/tPHL
Figure 2. Load circuitry for switching times.
l
D.U.T.
R
T
Test Circuit for Outputs
V
CC
< 2.7V
2.7–3.6V
≥ 4.5 V V
V
V
2.7V
CC
CC
V
O
50pF
C
L
of pulse generators.
OUT
I
RL= 1k
SV00902
1998 Apr 20
5
Page 6
Philips Semiconductors Product specification
Quad 2-input NAND gate
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
74LV00
1998 Apr 20
6
Page 7
Philips Semiconductors Product specification
Quad 2-input NAND gate
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74LV00
1998 Apr 20
7
Page 8
Philips Semiconductors Product specification
Quad 2-input NAND gate
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
74LV00
1998 Apr 20
8
Page 9
Philips Semiconductors Product specification
Quad 2-input NAND gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
74LV00
1998 Apr 20
9
Page 10
Philips Semiconductors Product specification
Quad 2-input NAND gate
74LV00
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code Date of release: 05-96
Document order number: 9397-750-04401
1998 Apr 20
10
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