Page 1
Preliminary
February 2000
Revised February 2000
74LCXZ16240
Low Voltage 16-Bit Inverting Buffer/Line Driver with
5V Tolerant Inputs/Outputs (Preliminary)
74LCXZ16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary)
General Description
The LCXZ16240 contains si xteen inverting buffers with 3STATE outputs designed to be employed as a memory and
address driver, clock driver, or bus-oriented transmitter/
receiver. The device is nibble controlled. Each nibble has
separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
When V
high impedance state during power up or power down. This
places the outputs in the high impedance (Z) state preventing intermittent low impedance loading or glitching in bus
oriented applications.
The LCXZ16240 is de si gn ed for low vo lt age (2 .7V or 3.3V)
V
environment.
The LCXZ16240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining CMOS low power dissipation.
is between 0 and 1.5V, the LCXZ16240 is in the
CC
applications with capacity o f inter facin g to a 5V sig nal
CC
Features
■ 5V tolerant inputs and outputs
■ Guaranteed power up/down high impedance
■ Supports live insertion/withdrawal
■ 2.7V–3.6V V
■ 4.5 ns t
■ ±24 mA output drive (V
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exce eds 500 mA
■ ESD performance:
Human body model > 2000V
Machine model > 200V
specifications provided
CC
max (VCC = 3.3V), 20 µA ICC max
PD
= 3.0V)
CC
Ordering Code:
Order Number Package Number Package Description
74LCXZ16240MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LCXZ16240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.
Connection Diagram Logic Symbol
Pin Descriptions
Pin Names Description
OE
n
I
0–I15
O
0–O15
© 2000 Fairchild Semiconductor Corporation DS500257 www.fairchildsemi.com
Output Enable Inputs (Active LOW)
Inputs
Outputs
Page 2
Truth Tables
Preliminary
74LCXZ16240
Inputs Outputs
OE
1
I0–I
3
O0–O
LL H
LH L
HX Z
Inputs Outputs
OE
2
I4–I
7
O4–O
LL H
LH L
HX Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Functional Description
The LCXZ16240 contains sixteen inverting buffers with 3STATE standard outputs. The de vice is n ibble (4 bits) controlled with each nibble fun c tion ing i de ntica lly, but independent of the other. The control pins may be shorted together
to obtain full 16-bit operation. The 3-STATE outputs are
Inputs Outputs
3
OE
3
I8–I
11
O8–O
11
LL H
LH L
HX Z
Inputs Outputs
7
OE
4
I12–I
15
O12–O
15
LL H
LH L
HX Z
controlled by an Output Enable (OEn) input for each nibble.
When OE
OE
is LOW, the outputs are in 2- stat e m od e. When
n
is HIGH, the outputs are in the high impedance mode,
n
but this does not inte rfere with enter ing new data into the
inputs.
Logic Diagram
www.fairchildsemi.com 2
Page 3
Preliminary
Absolute Maximum Ratings(Note 1)
Symbol Parameter Value Conditions Units
V
V
V
I
IK
I
OK
I
O
I
CC
I
GND
T
CC
I
O
STG
Supply Voltage −0.5 to +7.0 V
DC Input Voltage −0.5 to +7.0 V
DC Output Voltage −0.5 to +7.0 Output in 3-STATE or VCC = 0–1.5V
−0.5 to V
+ 0.5 Output in HIGH or LOW State (Note 2)
CC
DC Input Diode Current −50 VI < GND mA
DC Output Diode Current −50 VO < GND
+50 V
O
> V
CC
mA
DC Output Source/Sink Current ±50 mA
DC Supply Current per Supply Pin ±100 mA
DC Ground Current per Ground Pin ±100 mA
Storage Temperature −65 to +150 °C
Recommended Operating Conditions (Note 3)
Symbol Parameter Min Max Units
V
CC
V
I
V
O
I
OH/IOL
T
A
∆t/∆V Input Edge Rate, V
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating C onditions” table will def ine the conditions for act ual device operation.
Note 2: I
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
Supply Voltage Operating 2.7 3.6 V
Input Voltage 05.5V
Output Voltage HIGH or LOW State 0 V
3-STATE or V
= OFF 0 5.5
CC
Output Current VCC = 3.0V − 3.6V ±24
= 2.7V − 3.0V ±12
V
CC
CC
mA
Free-Air Operating Temperature −40 85 °C
= 0.8V–2.0V, VCC = 3.0V 0 10 ns/V
IN
Absolute Maximum Rating must be observed.
O
74LCXZ16240
V
V
DC Electrical Characteristics
Symbol Parameter Conditions
V
IH
V
IL
V
OH
V
OL
I
I
I
OZ
I
OFF
I
PU/PD
I
CC
∆I
Note 4: Outputs disab led or 3-STATE only.
HIGH Level Input Voltage 2.7 − 3.6 2.0 V
LOW Level Input Voltage 2.7 − 3.6 0.8 V
HIGH Level Output Voltage IOH = −100 µA2.7 − 3.6 VCC − 0.2
IOH = −12 mA 2.7 2.2
IOH = −18 mA 3.0 2.4
IOH = −24 mA 3.0 2.2
LOW Level Output Voltage IOL = 100 µA2.7 − 3.6 0.2
Input Leakage Current 0 ≤ VI ≤ 5.5V 2.7 − 3.6 ±5.0 µA
3-STATE Output Leakage 0 ≤ VO ≤ 5.5V
Power-Off Leakage Current VI or VO = 5.5V 0 10 µA
Power Up/Down VO = 0.5V to V
3-STATE Output Current VI = GND or V
Quiescent Supply Current VI = VCC or GND 2.7 − 3.6 225
Increase in ICC per Input VIH = VCC −0.6V 2.7 − 3.6 500 µA
CC
IOL = 12 mA 2.7 0.4
IOL = 16 mA 3.0 0.4
IOL = 24 mA 3.0 0.55
VI = VIH or V
3.6V ≤ VI, VO ≤ 5.5V (Note 4) 2.7 − 3.6 ±225
IL
CC
CC
3 www.fairchildsemi.com
V
TA = −40°C to +85°C
CC
(V) Min Max
2.7 − 3.6 ±5.0 µA
0 − 1.5 ±5.0 µA
Units
V
V
µA
Page 4
Preliminary
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500 Ω
Symbol Parameter
74LCXZ16240
t
PHL
t
PLH
t
PZL
t
PZH
t
PLZ
t
PHZ
t
OSHL
t
OSLH
Note 5: Skew is defined as t he absolute value of t he difference betwee n t he actual propagation delay for any tw o separate outpu ts of the same device. T he
specification applies to any outputs swit c hing in the same directi on, eit her HIGH-to-LOW (t
Propagation Delay 1.5 4.5 1.5 5.3
Data to Output 1.5 4.5 1.5 5.3
Output Enable Time 1.5 5.4 1.5 6.0
Output Disable Time 1.5 5.3 1.5 5.4
Output to Output Skew (Note 5) 1.0
VCC = 3.3V ± 0.3V VCC = 2.7V
CL = 50 pF CL = 50 pF
Min Max Min Max
1.55.41.56.0
1.55.31.55.4
1.0
) or LOW-to-HIGH (t
OSHL
OSLH
).
Dynamic Switching Characteristics
TA = 25°C
V
Symbol Parameter Conditions
V
OLP
V
OLV
Quiet Output Dynamic Peak V
Quiet Output Dynamic Valley V
OL
OL
CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 V
CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 V
CC
(V)
Typical
Capacitance
Symbol Parameter Conditions Typical Units
C
IN
C
OUT
C
PD
Input Capacitance VCC = Open, VI = 0V or V
Output Capacitance VCC = 3.3V, VI = 0V or V
CC
CC
7pF
8pF
Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 20 pF
Units
ns
ns
ns
ns
Unit
www.fairchildsemi.com 4
Page 5
AC LOADING and WAVEFORMS Generic for LCX Family
Preliminary
74LCXZ16240
FIGURE 1. AC Test Circuit (C
V
I
6V for VCC = 3.3V, 2.7V 50 pF
* 2 for VCC = 2.5V 30 pF
V
CC
Waveform for Inverting and Non-Inverting Functions
Propagation Delay. Pulse Width and t
Waveforms
rec
includes prob e and jig capacita nce)
L
C
L
3-STATE Output High Enabl e and
Disable Times for Logic
Setup Time, Ho ld Time and Recovery Time for Logic
3-STATE Output Low Enable and
Disable Times for Logic
(Input Characteristics; f =1MHz, t
Symbol
V
mi
V
mo
V
x
V
y
FIGURE 2. Waveforms
= tF = 3ns)
R
V
CC
3.3V ± 0.3V 2.7V
1.5V 1.5V
1.5V 1.5V
VOL + 0.3V VOL + 0.3V
VOH − 0.3V VOH − 0.3V
5 www.fairchildsemi.com
and t
t
rise
fall
Page 6
Schematic Diagram Generic for LCX Family
74LCXZ16240
Preliminary
www.fairchildsemi.com 6
Page 7
Physical Dimensions inches (millimeters) unless otherwise noted
Preliminary
74LCXZ16240
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
Package Number MS48A
7 www.fairchildsemi.com
Page 8
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Preliminary
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Fairchild does not assume any responsibility for us e of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
74LCXZ16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs (Preliminary)
instructions for use provided in the labeling, can be reasonably expected to result in a significan t injury to the
user.
www.fairchildsemi.com 8
Package Number MTD48
2. A critical component in any compon ent of a lif e supp ort
device or system whose failu re to perform can be reasonably expected to ca use the fa i lure of the li fe su pp ort
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
Loading...