Datasheet 74LCX373TTR, 74LCX373MTR, 74LCX373M Datasheet (SGS Thomson Microelectronics)

74LCX373

OCTAL D-TYPE LATCH NON-INVERTING (3-STATE)

WITH 5V TOLERANT INPUTS AND OUTPUTS

■ 5V TOLERANT INPUTS AND OUTPUTS

■ HIGH SPEED :

= 8.0 ns (MAX.) at VCC = 3V

t

PD

■ POWER DOWN PROTECTION ON INPUT S

AND OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

| = IOL = 24mA (MIN) at VCC = 3V

|I

OH

■ PCI BUS LEVELS GUARANT EED AT 2 4 mA

■ BALANCED PROPAGATION DELAYS:

t

≅ t

PLH

■ OPERATING VOLTAGE RANGE:

V

CC

PHL

(OPR) = 2.0V to 3.6V (1.5V Data

Retention)

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 373

■ LATCH-UP PERFORMANCE EXCEEDS

500mA (JESD 17)

■ ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);
MM > 200V

DESCRIPTION

The 74LCX373 is a low voltage CMOS OCTAL
D-TYPE LATCH with 3 STATE OUTPUT
NON-INVERTING fabricated with sub-micron
silicon gate and double-layer metal wiring C

2

MOS
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to 5V
signal environment for both inputs and outputs.
These 8 bit D-Type latch are controlled by a latch

PIN CONNECTION AND IEC LOGIC SYMBOLS

TSSOPSOP

ORDER CODES

PACKAGE TUBE T & R

SOP 74LCX373M 74LCX373MTR

TSSOP 74LCX373TTR

enable input (LE) and an output enable input (OE
While the LE inputs is held at a high level, t he Q
outputs will follow the data input. When the LE is
taken low, the Q outputs will be latched precisely
at the logic level of D input data. While the (OE
input is low, the 8 outputs will be in a normal lo gic
state (high or low logic level ) and while (OE

) is in
high leve l, the o utputs will be in a hig h imp edance
state.
It has same speed performance at 3. 3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.

).

)

1/10September 2001

74LCX373

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION TRUTH TABLE

PIN No SYMBOL NAME AND FUNCTION

1OE

3 State Output Enable
Input (Active LOW)

2, 5, 6, 9, 12,

D0 to D7 Data Inputs

15, 16,19

3, 4, 7, 8, 13,

Q0 to Q7 3-State Outputs

14, 17, 18

11 LE Latch Enable Input
10 GND Ground (0V)
20 V

CC

Positive Supply Voltage

LOGIC DIAGRAM

INPUT OUTPUT

OE

LE D Q

HXX Z

L L X NO CHANGE*
LHL L
LHH H

X : Don’t Care
Z : High Impedance
* : Q Outputs are latched at the time when th e LE input is taken

LOW.

This log i c diagram has not be used to esti m ate propaga tion delays

2/10

74LCX373

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

V

V
V
V

I

I

OK

I

I

CC

I

GND

T

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied

1) I

absolute ma xim um rating mu st be observed

O

2) V

< GND

O

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit

V

V
V
V

I

OH

I

OH

T

dt/dv Input Rise and Fall Time (note 2) 0 to 10 ns/V

1) Truth T abl e guaranteed: 1.5V to 3.6V

2) V

from 0.8V to 2V at VCC = 3.0V

IN

Supply Voltage

CC

DC Input Voltage

I

DC Output Voltage (OFF State)

O

DC Output Voltage (High or Low State) (note 1) -0.5 to VCC + 0.5

O

DC Input Diode Current

IK

DC Output Diode Current (note 2)
DC Output Current

O

DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature

stg

Lead Temperature (10 sec)

L

Supply Voltage (note 1)

CC

Input Voltage

I

Output Voltage (OFF State)

O

Output Voltage (High or Low State) 0 to V

O

, I

High or Low Level Output Current (VCC = 3.0 to 3.6V)

OL

, I

High or Low Level Output Current (VCC = 2.7V)

OL

Operating Temperature

op

-0.5 to +7.0 V

-0.5 to +7.0 V

-0.5 to +7.0 V

- 50 mA

- 50 mA

± 50 mA
± 100 mA
± 100 mA

-65 to +150 °C
300 °C

2.0 to 3.6 V
0 to 5.5 V
0 to 5.5 V

CC

± 24 mA
± 12 mA

-55 to 125 °C

V

V

3/10

74LCX373

DC SPECIFICATIONS

Test Condition Value

Symbol Parameter

IH

IL

OH

OL

I

I

off

High Level Input
Voltage

Low Level Input
Voltage

High Level Output
Voltage

Low Level Output
Voltage

Input Leakage
Current

Power Off Leakage
Current

High Impedance
Output Leakage

V

V

V

V

I

I

OZ

Current

I

CC

∆I

Quiescent Supply
Current

ICC incr. per Input

CC

V

CC

(V)

2.7 to 3.6

2.7 to 3.6

2.7

3.0

2.7 to 3.6

2.7

3.0

2.7 to 3.6

0

2.7 to 3.6

2.7 to 3.6

2.7 to 3.6

-40 to 85 °C -55 to 125 °C

Min. Max. Min. Max.

2.0 2.0 V

0.8 0.8 V

=-100 µAVCC-0.2 VCC-0.2

I

O

=-12 mA

I

O

I

=-18 mA

O

I

=-24 mA

O

=100 µA

I

O

I

=12 mA

O

I

=16 mA

O

I

=24 mA

O

= 0 to 5.5V

V

I

or VO = 5.5V

V

I

= VIH or V

V

I

VO = 0 to V

IL

CC

2.2 2.2

2.4 2.4

2.2 2.2

0.2 0.2

0.4 0.4

0.4 0.4

0.55 0.55

± 5 ± 5 µA

± 5 ± 5 µA

VI = VCC or GND

V

or VO= 3.6 to 5.5V

I

VIH = VCC - 0.6V

± 10 ± 10

500 500 µA

Unit

10 10 µA

10 10

µA

V

V

DYNAMIC SWITCHING CHARACTERISTICS

Test Condition Value

T

Symbol Parameter

V

OLP

V

OLV

1) Number of outputs d ef i ned as "n". Me asured with "n-1" output s switching from HIGH to LO W or LOW to HIGH. The remaini ng outpu t is
measur ed i n the LOW state.

Dynamic Low Level Quiet
Output (note 1)

V

3.3

CC

(V)

= 50pF

C

L

V

= 0V, VIH = 3.3V

IL

Min. Typ. Max.

4/10

= 25 °C

A

0.8

-0.8

Unit

V

AC ELECTRICAL CHARACTERISTICS

Test Condition Value

74LCX373

Symbol Parameter

V

CC

(V)

t

PLH tPHL

t

PLH tPHL

t

PZL tPZH

Propagation Delay
Time (Dn to Qn)

Propagation Delay
Time (LE to Qn)

Output Enable Time
to HIGH and LOW
level

t

PLZ tPHZ

Output Disable Time
from HIGH to LOW
level

t

Set-Up Time, HIGH

S

or LOW level
(Dn to LE)

t

Hold Time, HIGH or

h

LOW level
(Dn to LE)

t

t

OSLH

t

OSHL

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch­ing in the same direction, either HIGH or LOW (t

2) Param eter guaran te ed by design

LE Pulse Width,

W

HIGH
Output To Output

Skew Time (note1,

2)

2.7

3.0 to 3.6 1.5 8.0 1.5 8.0

2.7

3.0 to 3.6 1.5 8.5 1.5 8.5

2.7

3.0 to 3.6 1.5 8.5 1.5 8.5

2.7

3.0 to 3.6 1.5 7.5 1.5 7.5

2.7

3.0 to 3.6 2.5 2.5

2.7

3.0 to 3.6 1.5 1.5

2.7

3.0 to 3.6 3.3 3.3

3.0 to 3.6 50 500 2.5 1.0 1.0 ns

OSLH

C

L

(pF)

50 500 2.5

50 500 2.5

50 500 2.5

50 500 2.5

50 500 2.5

50 500 2.5

50 500 2.5

= | t

PLHm

- t

PLHn

R

(Ω)

|, t

L

OSHL

t

s

(ns)

= t

= | t

-40 to 85 °C -55 to 125 °C

r

Min. Max. Min. Max.

1.5 9.0 1.5 9.0

1.5 9.5 1.5 9.5

1.5 9. 5 1.5 9.5

1.5 8.5 1.5 8.5

2.5 2.5

1.5 1.5

3.3 3.3

- t

PHLn

|)

PHLm

Unit

ns

ns

ns

ns

ns

ns

ns

CAPACITIVE CHARACTERISTICS

Test Condition Value

= 25 °C

Symbol Parameter

V

CC

(V)

C

C

OUT

C

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I

Input Capacitance

IN

Output Capacitance
Power Dissipation Capacitance

PD

(note 1)

3.3

3.3

VIN = 0 to V
VIN = 0 to V

3.3 fIN = 10MHz
V

= 0 or V

IN

CC
CC

CC

T

A

Min. Typ. Max.

6pF
12 pF
50

= CPD x VCC x fIN + ICC/8 (per latch)

CC(opr)

Unit

pF

5/10

74LCX373

TEST CIRCUIT

TEST SWITCH

t

, t

PLH

PHL

, t

t

PZL

PLZ

t

, t

PZH

PHZ

CL = 50 pF or equival ent (includes jig and probe capacitance)
R

= R1 = 500Ω or equivalent

L

= Z

R

of pulse generator (typically 50Ω)

T

OUT

Open

6V

GND

WAVEFORM 1 : LE TO Qn PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH, Dn TO LE SETUP
AND HOLD TIMES (f=1MHz; 50% duty cycle)

6/10

WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle)

74LCX373

WAVEFORM 3 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)

7/10

74LCX373

SO-20 MECHANICAL DATA

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 2.65 0.104
a1 0.1 0.2 0.004 0.008
a2 2.45 0.096

b 0.35 0.49 0.014 0.019

b1 0.23 0.32 0.009 0.012

C 0.5 0.020
c1 45° (typ.)

D 12.60 13.00 0.496 0.512

E 10.00 10.65 0.393 0.419

e 1.27 0.050

e3 11.43 0.450

F 7.40 7.60 0.291 0.300

L 0.50 1.27 0.020 0.050
M 0.75 0.029
S8° (max.)

mm. inch

8/10

PO13L

74LCX373

TSSOP20 MECHANICAL DATA

mm. inch

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 1.2 0.047

A1 0.05 0.15 0.002 0.004 0.006

A2 0.8 1 1.05 0.031 0.039 0.041

b 0.19 0.30 0.007 0.012

c 0.09 0.20 0.004 0.0089

D 6.4 6.5 6.6 0.252 0.256 0.260

E 6.2 6.4 6.6 0.244 0.252 0.260

E1 4.3 4.4 4.48 0.169 0.173 0.176

e 0.65 BSC 0.0256 BSC

K0° 8°0° 8°

L 0.45 0.60 0.75 0.018 0.024 0.030

A2

A

A1

b

e

K

c

L

E

D

E1

PIN 1 IDENTIFICATION

1

0087225C

9/10

74LCX373

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