Datasheet 74LCX138TTR, 74LCX138MTR, 74LCX138M Datasheet (SGS Thomson Microelectronics)

74LCX138

LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV.)

WITH 5V TOLERANT INPUTS

■ 5V TOLERANT INPUTS

■ HIGH SPEED :

t

= 6.7ns (MAX.) at VCC = 3V

PD

■ POWER DOWN PROTECTION ON INPUT S

AND OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

| = IOL = 24mA (MIN) at VCC = 3V

OH

■ PCI BUS LEVELS GUARANT EED AT 2 4 mA

■ BALANCED PROPAGATION DELAYS:

t

≅ t

PLH

■ OPERATING VOLTAGE RANGE:

V

CC

PHL

(OPR) = 2.0V to 3.6V (1.5V Data

Retention)

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 138

■ LATCH-UP PERFORMANCE EXCEEDS

500mA (JESD 17)

■ ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);
MM > 200V

DESCRIPTION

The 74LCX138 is a low voltage CMOS 3 TO 8
LINE DECODER (INVERTING) fabricated with
sub-micron silicon gate and double-layer metal
wiring C

2

MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for inputs.
If the device is enabled, 3 binary select inputs (A,
B and C) determine which one of the o utputs will

TSSOPSOP

ORDER CODES

PACKAGE TUBE T & R

SOP 74LCX138M 74LCX138MTR

TSSOP 74LCX138TTR

go low. If enable input G1 is held low or either G2A
or G2B is held high, the decoding function is
ihnibited and all the 8 outputs go to high.
Three enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
It has same speed performance at 3. 3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

1/9September 2001

74LCX138

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

PIN No SYMBOL NAME AND FUNCTION

1, 2, 3 A, B, C Address Inputs

4, 5 G2A

6 G1 Enable Input

15, 14, 13, 12, 11, 10, 9, 7 Y0

8 GND Ground (0V)

16 V

, G2B Enable Inputs

to Y7 Outputs

CC

Positive Supply Voltage

TRUTH TABLE

INPUTS

ENABLE SELECT

G2B

X : Don’t Care

G2A G1CBAY0Y1 Y2 Y3 Y4 Y5 Y6 Y7

XXLXXXHHHHHHHH
XHXXXXHHHHHHHH
HXXXXXHHHHHHHH

LLHLLLLHHHHHHH
LLHLLHHLHHHHHH
LLHLHLHHLHHHHH
LLHLHHHHHLHHHH
LLHHL LHHHHLHHH
LLHHLHHHHHHLHH
LLHHHLHHHHHHLH
LLHHHHHHHHHHHL

OUTPUTS

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LOGIC DIAGRAM

This log i c diagram has not be used to esti m ate propaga tion delays

ABSOLUTE MAXIMUM RATINGS

74LCX138

Symbol Parameter Value Unit

V

V
V
V

I

I

OK

I

I

CC

I

GND

T

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied

1) I

absolute ma xim um rating mu st be observed

O

2) V

< GND

O

Supply Voltage

CC

DC Input Voltage

I

DC Output Voltage (VCC = 0V)

O

DC Output Voltage (High or Low State) (note 1) -0.5 to VCC + 0.5

O

DC Input Diode Current

IK

DC Output Diode Current (note 2)
DC Output Current

O

DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature

stg

Lead Temperature (10 sec)

L

-0.5 to +7.0 V

-0.5 to +7.0 V

-0.5 to +7.0 V
V

- 50 mA

- 50 mA

± 50 mA
± 100 mA
± 100 mA

-65 to +150 °C
300 °C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Unit

V

V
V
V

I

OH

I

OH

T

dt/dv Input Rise and Fall Time (note 2) 0 to 10 ns/V

1) Truth T abl e guaranteed: 1.5V to 3.6V

2) V

from 0.8V to 2V at VCC = 3.0V

IN

Supply Voltage (note 1)

CC

Input Voltage

I

Output Voltage (VCC = 0V)

O

Output Voltage (High or Low State) 0 to V

O

, I

High or Low Level Output Current (VCC = 3.0 to 3.6V)

OL

, I

High or Low Level Output Current (VCC = 2.7V)

OL

Operating Temperature

op

2.0 to 3.6 V
0 to 5.5 V
0 to 5.5 V

CC

± 24 mA
± 12 mA

-55 to 125 °C

V

3/9

74LCX138

DC SPECIFICATIONS

Test Condition Value

Symbol Parameter

IH

IL

OH

OL

I

I

off

CC

High Level Input
Voltage

Low Level Input
Voltage

High Level Output
Voltage

Low Level Output
Voltage

Input Leakage
Current

Power Off Leakage
Current

Quiescent Supply
Current

ICC incr. per Input

V

V

V

V

I

I

CC

∆I

V

CC

(V)

2.7 to 3.6

2.7 to 3.6

2.7

3.0

2.7 to 3.6

2.7

3.0

2.7 to 3.6

0

2.7 to 3.6

2.7 to 3.6

-40 to 85 °C -55 to 125 °C

Min. Max. Min. Max.

2.0 2.0 V

0.8 0.8 V

=-100 µAVCC-0.2 VCC-0.2

I

O

=-12 mA

I

O

I

=-18 mA

O

I

=-24 mA

O

=100 µA

I

O

I

=12 mA

O

I

=16 mA

O

I

=24 mA

O

= 0 to 5.5V

V

I

or VO = 5.5V

V

I

2.2 2.2

2.4 2.4

2.2 2.2

0.2 0.2

0.4 0.4

0.4 0.4

0.55 0.55
± 5 ± 5 µA

VI = VCC or GND

V

or VO= 3.6 to 5.5V

I

VIH = VCC - 0.6V

± 10 ± 10

500 500 µA

Unit

10 10 µA
10 10

µA

V

V

DYNAMIC SWITCHING CHARACTERISTICS

Test Condition Value

T

Symbol Parameter

V

OLP

V

OLV

1) Number of outputs d ef i ned as "n". Me asured with "n-1" output s switching from HIGH to LO W or LOW to HIGH. The remaini ng outpu t is
measur ed i n the LOW state.

Dynamic Low Level Quiet
Output (note 1)

V

3.3

CC

(V)

= 50pF

C

L

V

= 0V, VIH = 3.3V

IL

Min. Typ. Max.

= 25 °C

A

0.8

-0.8

Unit

V

4/9

AC ELECTRICAL CHARACTERISTICS

Test Condition Value

74LCX138

Symbol Parameter

V

CC

(V)

t

PLH tPHL

t

PLH tPHL

t

PLH tPHL

t

OSLH

t

OSHL

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch­ing in the same direction, either HIGH or LOW (t

2) Param eter guaran te ed by design

Propagation Delay
Time A, B, C to Y

Propagation Delay
Time G1 to Y

Propagation Delay
Time G2

Output To Output

to Y

Skew Time (note1,

2)

2.7

3.0 to 3.6 1.5 6.7 1.5 6.7

2.7

3.0 to 3.6 1.5 5.8 1.5 5.8

2.7

3.0 to 3.6 1.5 6.5 1.5 6.5

3.0 to 3.6 50 500 2.5 1.0 1.0 ns

OSLH

C

L

(pF)

50 500 2.5

50 500 2.5

50 500 2.5

= | t

PLHm

- t

PLHn

R

(Ω)

|, t

L

OSHL

t

s

(ns)

= t

= | t

-40 to 85 °C -55 to 125 °C

r

Min. Max. Min. Max.

7.9 7.9

6.4 6.4

7.4 7.4

- t

PHLn

|)

PHLm

Unit

ns

ns

ns

CAPACITIVE CHARACTERISTICS

Test Condition Value

T

Symbol Parameter

C

C

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without

load. (R ef er to Test Circui t). Averag e operating cu rrent can be obtained by the foll owing equat io n. I

Input Capacitance

IN

Power Dissipation Capacitance

PD

(note 1)

V

CC

(V)

3.3

VIN = 0 to V

3.3 fIN = 10MHz
V

= 0 or V

IN

Min. Typ. Max.

CC

CC

CC(opr)

= 25 °C

A

Unit

6pF

42

= CPD x VCC x fIN + I

pF

CC

TEST CIRCUIT

CL = 50pF or equivalent (includes jig and p robe capacitance)
R

= 500Ω or equivalent

L

R

= Z

of pulse generator (typically 50Ω)

T

OUT

5/9

74LCX138

WAVEFORM 1 : PROPAGATION DELAYS FOR INVERTING OUTPUTS (f=1MHz; 50% duty cycle)

WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING OUTPUTS (f=1MHz; 50% duty cycle)

6/9

SO-16 MECHANICAL DATA

74LCX138

DIM.

A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064

b 0.35 0.46 0.013 0.018

b1 0.19 0.25 0.007 0.010

C 0.5 0.019
c1 45° (typ.)

D 9.8 10 0.385 0.393

E 5.8 6.2 0.228 0.244

e 1.27 0.050

e3 8.89 0.350

F 3.8 4.0 0.149 0.157

G 4.6 5.3 0.181 0.208

L 0.5 1.27 0.019 0.050
M 0.62 0.024
S8° (max.)

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

PO13H

7/9

74LCX138

TSSOP16 MECHANICAL DATA

mm. inch

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 1.2 0.047

A1 0.05 0.15 0.002 0.004 0.006

A2 0.8 1 1.05 0.031 0.039 0.041

b 0.19 0.30 0.007 0.012

c 0.09 0.20 0.004 0.0089

D 4.9 5 5.1 0.193 0.197 0.201

E 6.2 6.4 6.6 0.244 0.252 0.260

E1 4.3 4.4 4.48 0.169 0.173 0.176

e 0.65 BSC 0.0256 BSC

K0° 8°0° 8°

L 0.45 0.60 0.75 0.018 0.024 0.030

A2

A

A1

b

e

c

K

L

E

D

E1

PIN 1 IDENTIFICATION

8/9

1

0080338D

74LCX138

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