Datasheet 74HCT4060U, 74HCT4060DB, 74HCT4060D, 74HC4060DB, 74HC4060D Datasheet (Philips)
...Page 1
DATA SH EET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT4060
14-stage binary ripple counter with
oscillator
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
Page 2
December 1990 2
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
FEATURES
• All active components on chip
• RC or crystal oscillator configuration
• Output capability: standard (except for RTC and CTC)
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4060 are high-speed Si-gate CMOS
devices and are pin compatible with “4060” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4060 are 14-stage ripple-carry
counter/dividers and oscillators with three oscillator
terminals (RS, R
TC
and CTC), ten buffered outputs (Q3to
Q9and Q11to Q13) and an overriding asynchronous
master reset (MR).
The oscillator configuration allows design of either RC or
crystal oscillator circuits. The oscillator may be replaced by
an external clock signal at input RS. In this case keep the
other oscillator pins (RTCand CTC) floating.
The counter advances on the negative-going transition of
RS. A HIGH level on MR resets the counter (Q3to Q9and
Q11to Q13= LOW), independent of other input conditions.
In the HCT version, the MR input is TTL compatible, but
the RS input has CMOS input switching levels and can be
driven by a TTL output by using a pull-up resistor to VCC.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; tr=tf= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PD in µW):
PD=CPD× V
CC
2
× fi+ ∑ (CL× V
CC
2
× fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
CC
2
× fo) = sum of outputs
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
3. For formula on dynamic power dissipation see next pages.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL/ tPLH
propagation delay CL= 15 pF; VCC=5 V
RS to Q
3
31 31 ns
Q
n
to Q
n+1
66ns
t
PHL
MR to Q
n
17 18 ns
f
max
maximum clock frequency 87 88 MHz
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per package notes 1, 2 and 3 40 40 pF
Page 3
December 1990 3
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 2, 3 Q
11
to Q
13
counter outputs
7, 5, 4, 6, 14, 13, 15 Q
3
to Q
9
counter outputs
8 GND ground (0 V)
9C
TC
external capacitor connection
10 R
TC
external resistor connection
11 RS clock input/oscillator pin
12 MR master reset
16 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
Page 4
December 1990 4
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
DYNAMIC POWER DISSIPATION FOR 74HC
Note
1. GND = 0 V; T
amb
=25°C
DYNAMIC POWER DISSIPATION FOR 74HCT
Notes
1. GND = 0 V; T
amb
=25°C
2. Where: fo= output frequency in MHz
f
osc
= oscillator frequency in MHz
∑ (CL× V
CC
2
× fo) = sum of outputs
CL= output load capacitance in pF
Ct= timing capacitance in pF
VCC= supply voltage in V
APPLICATIONS
• Control counters
• Timers
• Frequency dividers
• Time-delay circuits
PARAMETER V
CC
(V) TYPICAL FORMULA FOR PD(µW) (note 1)
total dynamic power
dissipation when using the
on-chip oscillator (P
D
)
2.0
4.5
6.0
CPD× f
osc
× V
CC
2
+∑(CL× V
CC
2
× fo) + 2Ct× V
CC
2
× f
osc
+ 60 × V
CC
CPD× f
osc
× V
CC
2
+∑(CL× V
CC
2
× fo) + 2Ct× V
CC
2
× f
osc
+ 1 750 × V
CC
CPD× f
osc
× V
CC
2
+∑(CL× V
CC
2
× fo) + 2Ct× V
CC
2
× f
osc
+ 3 800 × V
CC
PARAMETER VCC (V) TYPICAL FORMULA FOR PD(µW) (note 1)
total dynamic power
dissipation when using the
on-chip oscillator (P
D
)
4.5 CPD× f
osc
× V
CC
2
+∑(CL× V
CC
2
× fo) + 2Ct× V
CC
2
× f
osc
+ 1 750 × V
CC
Fig.4 Functional diagram.
Page 5
December 1990 5
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
Fig.5 Logic diagram.
Fig.6 Timing diagram.
Page 6
December 1990 6
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
DC CHARACTERISTICS FOR 74HC
Output capability: standard (except for R
TC
and CTC)
I
CC
category: MSI
Voltages are referenced to GND (ground = 0 V)
SYMBOL
PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
V
I
OTHER
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
V
IH
HIGH level input voltage
MR input
1.5
3.15
4.2
1.3
2.4
3.1
1.5
3.15
4.2
1.5
3.15
4.2
V 2.0
4.5
6.0
V
IL
LOW level input voltage
MR input
0.8
2.1
2.8
0.5
1.35
1.8
0.5
1.35
1.8
0.5
1.35
1.8
V 2.0
4.5
6.0
V
IH
HIGH level input voltage
RS input
1.7
3.6
4.8
1.7
3.6
4.8
1.7
3.6
4.8
V 2.0
4.5
6.0
V
IL
LOW level input voltage
RS input
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V 2.0
4.5
6.0
V
OH
HIGH level output voltage
R
TC
output
3.98
5.48
3.84
5.34
3.7
5.2
V 4.5
6.0
RS=GND
and
MR=GND
−I
O
= 2.6 mA
−I
O
= 3.3 mA
3.98
5.48
3.84
5.34
3.7
5.2
V 4.5
6.0
RS=V
CC
and
MR=V
CC
−IO= 0.65 mA
−I
O
= 0.85 mA
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
V 2.0
4.5
6.0
RS=GND
and
MR=GND
−I
O
=20µA
−I
O
=20µA
−I
O
=20µA
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
V 2.0
4.5
6.0
RS=V
CC
and
MR=V
CC
−IO=20µA
−I
O
=20µA
−I
O
=20µA
V
OH
HIGH level output voltage
C
TC
output
3.98
5.48
3.84
5.34
3.7
5.2
V 4.5
6.0
RS=V
IH
and
MR=V
IL
−IO= 3.2 mA
−I
O
= 4.2 mA
V
OH
HIGH level output voltage
except R
TC
output
1.9
4.4
5.9
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
V 2.0
4.5
6.0
V
IH
or
V
IL
−IO=20µA
−I
O
=20µA
−I
O
=20µA
V
OH
HIGH level output voltage
except R
TC
and C
TC
outputs
3.98
5.48
3.84
5.34
3.7
5.2
V 4.5
6.0
V
IH
or
V
IL
−IO= 4.0 mA
−I
O
= 5.2 mA
V
OL
LOW level output voltage
R
TC
output
0.26
0.26
0.33
0.33
0.4
0.4
4.5
6.0
RS=V
CC
and
MR=GND
I
O
= 2.6 mA
I
O
= 3.3 mA
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V 2.0
4.5
6.0
RS=V
CC
and
MR=GND
I
O
=20µA
I
O
=20µA
I
O
=20µA
Page 7
December 1990 7
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
V
OL
LOW level output voltage
C
TC
output
0.26
0.26
0.33
0.33
0.4
0.4
V 4.5
6.0
RS=V
IL
and
MR=V
IH
IO= 3.2 mA
I
O
= 4.2 mA
V
OL
LOW level output voltage
except R
TC
output
0
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V 2.0
4.5
6.0
V
IH
or
V
IL
IO=20µA
I
O
=20µA
I
O
=20µA
V
OL
LOW level output voltage
except R
TC
and C
TC
outputs
0.26
0.26
0.33
0.33
0.4
0.4
V 4.5
6.0
V
IH
or
V
IL
IO= 4.0 mA
I
O
= 5.2 mA
±I
I
input leakage current 0.1 1.0 1.0 µA 6.0 V
CC
or
GND
I
CC
quiescent supply current 8.0 80.0 160.0 µA 6.0 V
CC
or
GND
IO=0
SYMBOL
PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
V
I
OTHER
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
Page 8
December 1990 8
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r=tf
= 6 ns; CL= 50 pF
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
RS to Q
3
99
36
29
300
60
51
375
75
64
450
90
77
ns
2.0
4.5
6.0
Fig.12
t
PHL
/ t
PLH
propagation delay
Qnto Q
n+1
22
8
6
80
16
14
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.14
t
PHL
propagation delay
MR to Q
n
55
20
16
175
35
30
220
44
37
265
53
45
ns
2.0
4.5
6.0
Fig.13
t
THL
/ t
TLH
output transition time
19
7
6
75
15
13
95
19
16
110
22
19
ns
2.0
4.5
6.0
Fig.12
t
W
clock pulse width
RS; HIGH or LOW
80
16
14
17
6
5
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.12
t
W
master reset pulse
width MR; HIGH
80
16
14
25
9
7
100
20
17
120
24
20
ns
2.0
4.5
6.0
Fig.13
t
rem
removal time
MR to RS
100
20
17
28
10
8
125
25
21
150
30
26
ns
2.0
4.5
6.0
Fig.13
f
max
maximum clock pulse
frequency
6.0
30
35
26
80
95
4.8
24
28
4.0
20
24
MHz
2.0
4.5
6.0
Fig.12
Page 9
December 1990 9
Philips Semiconductors Product specification
14-stage binary ripple counter with
oscillator
74HC/HCT4060
DC CHARACTERISTICS FOR 74HCT
Output capability: standard (except for R
TC
and CTC)
I
CC
category: MSI
Voltages are referenced to GND (ground = 0 V)
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
V
I
OTHER
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
V
IH
HIGH level input voltage 2.0 2.0 2.0 V 4.5 to 5.5 note 2
V
IL
LOW level input voltage 0.8 0.8 0.8 V 4.5 to 5.5 note 2
V
OH
HIGH level output voltage
R
TC
output
3.98 3.84 3.7 V 4.5 RS=GND and MR=GND −I
O
= 2.6 mA
3.98 3.84 3.7 V 4.5 RS = V
CC
and MR = VCC−IO= 0.65 mA
4.4 4.5 4.4 4.4 V 4.5 RS=GND and MR=GND −I
O
=20µA
4.4 4.5 4.4 4.4 V 4.5 RS=V
CC
and MR=V
CC
−IO=20µA
V
OH
HIGH level output voltage
C
TC
output
3.98 3.84 3.7 V 4.5 RS = V
IH
and MR = VIL−IO= 3.2 mA
V
OH
HIGH level output voltage
except R
TC
output
4.4 4.5 4.4 4.4 V 4.5 VIH or V
IL
−IO=20µA
V
OH
HIGH level output voltage
except R
TC
and C
TC
outputs
3.98 3.84 3.7 V 4.5 VIH or V
IL
−IO= 4.0 mA
V
OL
LOW level output voltage
R
TC
output
0.26 0.33 0.4 V 4.5 RS=V
CC
and MR=GND IO= 2.6 mA
0 0.1 0.1 0.1 V 4.5 RS=V
CC
and MR=GND IO=20µA
V
OL
LOW level output voltage
C
TC
output
0.26 0.33 0.4 V 4.5 RS = V
IL
and MR = VIHIO= 3.2 mA
V
OL
LOW level output voltage
except R
TC
output
0 0.1 0.1 0.1 V 4.5 VIH or V
IL
IO=20µA
V
OL
LOW level output voltage
except R
TC
and C
TC
outputs
0.26 0.33 0.4 V 4.5 VIH or V
IL
IO= 4.0 mA
±I input leakage current 0.1 1.0 1.0 µA 5.5 V
CC
or GND
I
CC
quiescent supply current 8.0 80.0 160.0 µA 5.5 VCC or GND I
O
=0
∆I
CC
additional quiescent supply
current per input pin for unit
load coefficient is 1 (note 1)
100 360 450 490 µA 4.5 to 5.5 V
CC
− 2.1 V other inputs at
V
CC
or GND;
I
O
=0
Page 10
December 1990 10
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
Notes
1. The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given here.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
2. Only input MR (pin 12) has TTL input switching levels for the HCT versions.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r=tf
= 6 ns; CL= 50 pF
INPUT UNIT LOAD COEFFICIENT
MR 0.40
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
RS to Q
3
33 66 83 99 ns 4.5 Fig.12
t
PHL
/ t
PLH
propagation delay
Qnto Q
n+1
8 16 20 24 ns 4.5 Fig.14
t
PHL
propagation delay
MR to Q
n
21 44 55 66 ns 4.5 Fig.13
t
THL
/ t
TLH
output transition time 7 15 19 22 ns 4.5 Fig.12
t
W
clock pulse width
RS; HIGH or LOW
16 6 20 24 ns 4.5 Fig.12
t
W
master reset pulse
width MR; HIGH
16 6 20 24 ns 4.5 Fig.13
t
rem
removal time
MR to RS
26 13 33 39 ns 4.5 Fig.13
f
max
maximum clock pulse
frequency
30 80 24 20 MHz 4.5 Fig.12
Page 11
December 1990 11
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
Fig.7 Test set-up for measuring forward
transconductance gfs=dio / dviat vois
constant (see also graph Fig.8);
MR = LOW.
handbook, halfpage
MBA333
14
12
10
8
6
4
2
0123456
g
fs
(mA/V)
CC
V
(V)
max.
min.
typ.
Fig.8 Typical forward transconductance gfsas a
function of the supply voltage VCCat
T
amb
=25°C.
Fig.9 RC oscillator frequency as a function of
Rtand Ctat VCC= 2.0 to 6.0 V; T
amb
=25°C.
Ctcurve at Rt= 100 kΩ; R2 = 200 kΩ.
Rtcurve at Ct= 1 nF; R2 = 2 × Rt.
RC OSCILLATOR
Fig.10 Example of a RC oscillator.
Typical formula for oscillator frequency:
f
osc
1
2.5 RtCt××
--------------------------------
=
TIMING COMPONENT LIMITATIONS
The oscillator frequency is mainly determined by RtCt, provided R2 ≈ 2Rt and R2C2 << RtCt. The function of R2 is to
minimize the influence of the forward voltage across the input protection diodes on the frequency. The stray capacitance
C2 should be kept as small as possible. In consideration of accuracy, Ctmust be larger than the inherent stray
capacitance. Rtmust be larger than the “ON” resistance in series with it, which typically is 280 Ω at VCC= 2.0 V, 130 Ω at
VCC = 4.5 V and 100 Ω at VCC= 6.0 V.
The recommended values for these components to maintain agreement with the typical oscillation formula are:
Ct> 50 pF, up to any practical value,
10 kΩ<Rt<1 MΩ.
In order to avoid start-up problems, Rt≥ 1 kΩ.
Page 12
December 1990 12
Philips Semiconductors Product specification
14-stage binary ripple counter with oscillator 74HC/HCT4060
Fig.11 External components connection for a crystal oscillator.
TYPICAL CRYSTAL OSCILLATOR
In Fig.11, R2 is the power limiting resistor.
For starting and maintaining oscillation a minimum
transconductance is necessary, so R2 should not
be too large. A practical value for R2 is 2.2 kΩ.
AC WAVEFORMS
Fig.12 Waveforms showing the clock (RS) to
output (Q3) propagation delays, the clock
pulse width, the output transition times and
the maximum clock frequency.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: V
M
= 1.3 V; VI= GND to 3 V.
Fig.13 Waveforms showing the master reset (MR)
pulse width, the master reset to output (Qn)
propagation delays and the master reset to
clock (RS) removal time.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: V
M
= 1.3 V; VI= GND to 3 V.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
Fig.14 Waveforms showing the output (Qn) to Q
n+1
propagation delays.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: V
M
= 1.3 V; VI= GND to 3 V.
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