Page 1
DATA SH EET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT4353
Triple 2-channel analog
multiplexer/demultiplexer with latch
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
Page 2
December 1990 2
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
FEATURES
• Wide analog input voltage range: ± 5 V
• Low “ON” resistance:
80 Ω (typ.) at VCC− VEE= 4.5 V
70 Ω (typ.) at VCC− VEE= 6.0 V
60 Ω (typ.) at VCC− VEE= 9.0 V
• Logic level translation:
to enable 5 V logic to communicate with ± 5 V analog
signals
• Typical “break before make” built in
• Address latches provided
• Output capability: non-standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4353 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4353 are triple 2-channel analog
multiplexers/demultiplexers with two common enable
inputs (
E1and E2) and a latch enable input (LE). Each
multiplexer has two independent inputs/outputs (nY0and
nY1), a common input/output (nZ) and select inputs (S1to
S3).
Each multiplexer/demultiplexer contains two bidirectional
analog switches, each with one side connected to an
independent input/output (nY0and nY1) and the other side
connected to a common input/output (nZ).
With E1LOW and E2HIGH, one of the two switches is
selected (low impedance ON-state) by S1to S3.
The data at the select inputs may be latched by using the
active LOW latch enable input (LE). When LE is HIGH, the
latch is transparent. When either of the two enable inputs,
E1(active LOW) and E2(active HIGH), is inactive, all
analog switches are turned off.
VCCand GND are the supply voltage pins for the digital
control inputs (S1to S3, LE, E1and E2). The VCCto GND
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY0and nY1, and nZ) can
swing between VCCas a positive limit and VEEas a
negative limit. VCC− VEEmay not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEEis
connected to GND (typically ground).
QUICK REFERENCE DATA
VEE= GND = 0 V; T
amb
= 25 °C; tr= tf= 6 ns
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PZH
/ t
PZL
turn “ON” time E1,E2or Snto V
os
CL= 50 pF; RL=1 kΩ;
VCC= 5 V
29 21 ns
t
PHZ
/ t
PLZ
turn “OFF” time E1,E2or Snto V
os
20 22 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per switch notes 1 and 2 23 23 pF
C
S
max. switch capacitance
independent (Y) 5 5 pF
common (Z) 8 8 pF
Notes
1. CPDis used to determine the dynamic power
dissipation (PDin µW):
PD=
CPD× V
CC
2
× fi+ ∑ {(CL+CS)×V
CC
2
× fo} where:
fi= input frequency in MHz
CL= output load capacitance in pF
fo= output frequency in MHz
CS= max. switch capacitance in pF
∑ {(CL×CS) × V
CC
2
× fo} = sum of outputs
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package
Information”
.
Page 3
December 1990 3
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
2, 1 2Y
0
,2Y
1
independent inputs/outputs
5 3Z common input/output
6, 4 3Y
0
,3Y
1
independent inputs/outputs
3, 14 n.c. not connected
7
E
1
enable input (active LOW)
8E
2
enable input (active HIGH)
9V
EE
negative supply voltage
10 GND ground (0 V)
11
LE latch enable input (active LOW)
15, 13, 12 S
1
to S
3
select inputs
16, 17 1Y
0
,1Y
1
independent inputs/outputs
18 1Z common input/output
19 2Z common input/output
20 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
Page 4
December 1990 4
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
FUNCTION TABLE
Notes
1. Last selected channel “ON”.
2. Selected channels latched.
H = HIGH voltage level
L = LOW voltage level
X = don’t care
↓ = HIGH-to-LOW
LE transition
APPLICATIONS
• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating
INPUTS
CHANNEL
ON
E
1
E
2
LE S
n
H
X
H
L
X
X
XXnone
none
L
L
H
H
H
H
LHnY0 − nZ
nY
1
− nZ
L
X
H
X
L
↓
X
X
(1)
(2)
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
Page 5
December 1990 5
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to VEE= GND (ground = 0 V)
Note to ratings
1. To avoid drawing V
CC
current out of terminals nZ, when switch current flows in terminals nYn, the voltage drop across
the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no VCCcurrent will flow
out of terminals nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at nYnand
nZ may not exceed VCCor VEE.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS
V
CC
DC supply voltage −0.5 +11.0 V
±I
IK
DC digital input diode current 20 mA for VI<−0.5 V or VI> VCC+ 0.5 V
±I
SK
DC switch diode current 20 mA for VS<−0.5 V or VS> VCC+ 0.5 V
±I
S
DC switch current 25 mA for −0.5 V < VS< VCC+ 0.5 V
±I
EE
DC VEEcurrent 20 mA
±I
CC
;
±I
GND
DC VCCor GND current 50 mA
T
stg
storage temperature range −65 +150 °C
P
tot
power dissipation per package for temperature range: −40 to +125 °C
74HC/HCT
plastic DIL 750 mW above +70 °C: derate linearly with 12 mW/K
plastic mini-pack (SO) 500 mW above +70 °C: derate linearly with 8 mW/K
P
S
power dissipation per switch 100 mW
SYMBOL PARAMETER
74HC 74HCT
UNIT CONDITIONS
min. typ. max. min. typ. max.
V
CC
DC supply voltage VCC−GND 2.0 5.0 10.0 4.5 5.0 5.5 V see Figs 6 and 7
V
CC
DC supply voltage VCC−V
EE
2.0 5.0 10.0 2.0 5.0 10.0 V see Figs 6 and 7
V
I
DC input voltage range GND V
CC
GND V
CC
V
V
S
DC switch voltage range V
EE
V
CC
V
EE
V
CC
V
T
amb
operating ambient temperature range −40 +85 −40 +85 °C see DC and AC
CHARACTERISTICS
T
amb
operating ambient temperature range −40 +125 −40 +125 °C
t
r,tf
input rise and fall times
6.0
1000
500
400
250
6.0 500 ns
VCC= 2.0 V
VCC= 4.5 V
VCC= 6.0 V
VCC= 10.0 V
Page 6
December 1990 6
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
Fig.6 Guaranteed operating area as a function of
the supply voltages for 74HC4353.
handbook, halfpage
10
8
6
4
2
0
0246810
VCC- VEE(V)
VCC- GND
(V)
MBA334
operating area
Fig.7 Guaranteed operating area as a function of
the supply voltages for 74HCT4353.
DC CHARACTERISTICS FOR 74HC/HCT
For 74HC: V
CC
− GND or VCC− VEE= 2.0, 4.5, 6.0 and 9.0 V
For 74HCT: V
CC
− GND = 4.5 and 5.5 V; VCC− VEE= 2.0, 4.5, 6.0 and 9.0 V
Notes to DC characteristics
1. At supply voltages (V
CC
− VEE) approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear.
There it is recommended that these devices be used to transmit digital signals only, when using these supply
voltages.
2. For test circuit measuring RONsee Fig.8.
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC/HCT
V
CC
(V)
V
EE
(V)
I
S
(µA)
V
is
V
I
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
R
ON
ON resistance
(peak)
−
100
90
70
−
180
160
130
−
225
200
165
−
270
240
195
Ω
Ω
Ω
Ω
2.0
4.5
6.0
4.5
0
0
0
−4.5
100
1000
1000
1000
V
CC
to
V
EE
V
IN
or
V
IL
R
ON
ON resistance
(rail)
150
80
70
60
−
140
120
105
−
175
150
130
−
210
180
160
Ω
Ω
Ω
Ω
2.0
4.5
6.0
4.5
0
0
0
−4.5
100
1000
1000
1000
VEEV
IH
or
V
IL
R
ON
ON resistance 150
90
80
65
−
160
140
120
−
200
175
150
−
240
210
180
Ω
Ω
Ω
Ω
2.0
4.5
6.0
4.5
0
0
0
−4.5
100
1000
1000
1000
VCCV
IH
or
V
IL
∆R
ON
maximum
∆ON resistance
between any two
channels
−
9
8
6
Ω
Ω
Ω
Ω
2.0
4.5
6.0
4.5
0
0
0
−4.5
V
CC
to
V
EE
V
IH
or
V
IL
Page 7
December 1990 7
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
DC CHARACTERISTICS FOR 74HC
Voltages are referenced to GND (ground = 0 V)
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
V
EE
(V)
V
I
OTHER+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
V
IH
HIGH level
input voltage
1.5
3.15
4.2
6.3
1.2
2.4
3.2
4.7
1.5
3.15
4.2
6.3
1.5
3.15
4.2
6.3
V 2.0
4.5
6.0
9.0
V
IL
LOW level
input voltage
0.8
2.1
2.8
4.3
0.5
1.35
1.8
2.7
0.5
1.35
1.8
2.7
0.5
1.35
1.8
2.7
V 2.0
4.5
6.0
9.0
±I
I
input leakage
current
0.1
0.2
1.0
2.0
1.0
2.0
µA 6.0
10.0
0
0
V
CC
or
GND
±I
S
analog switch
OFF-state
current per
channel
0.1 1.0 1.0 µA 10.0 0V
IH
or
V
IL
VS =
V
CC
− V
EE
(see Fig.10)
±I
S
analog switch
OFF-state
current all
channels
0.1 1.0 1.0 µA 10.0 0V
IH
or
V
IL
VS =
V
CC
− V
EE
(see Fig.10)
±I
S
analog switch
ON-state
current
0.1 1.0 1.0 µA 10.0 0V
IH
or
V
IL
VS =
V
CC
− V
EE
(see Fig.11)
I
CC
quiescent
supply current
8.0
16.0
80.0
160.0
160.0
320.0
µA 6.0
10.0
0
0
V
CC
or
GND
V
is=VEE
or
V
CC;Vos
=
V
CC
or V
EE
Page 8
December 1990 8
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r=tf
= 6 ns; CL= 50 pF
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
V
EE
(V)
OTHER+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
Visto V
os
14
5
4
4
60
12
10
8
75
15
13
10
90
18
15
12
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL= ∞;
CL= 50 pF
(see Fig.18)
t
PZH
/ t
PZL
turn “ON” time
E1;E2to V
os
61
22
18
18
250
50
43
40
315
63
54
50
375
75
64
60
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PZH
/ t
PZL
turn “ON” time
LE to V
os
55
20
16
17
200
40
34
40
250
50
43
50
300
60
51
60
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PZH
/ t
PZL
turn “ON” time
Snto V
os
61
22
18
17
225
45
38
40
280
56
48
50
340
68
58
60
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PHZ
/ t
PLZ
turn “OFF” time
E1;E2to V
os
66
24
19
19
250
50
43
40
315
63
54
50
375
75
64
60
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PHZ
/ t
PLZ
turn “OFF” time
Snto Vos; LE to V
os
55
20
16
19
200
40
34
40
250
50
43
50
300
60
51
60
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
su
set-up time Snto LE 60
12
10
18
17
6
5
8
75
15
13
23
90
18
15
27
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.20)
t
h
hold time Snto LE 5
5
5
5
−6
−2
−2
−3
5
5
5
5
5
5
5
5
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.20)
t
W
LE minimum pulse
width HIGH
80
16
14
16
11
4
3
6
100
20
17
20
120
24
20
24
ns 2.0
4.5
6.0
4.5
0
0
0
−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.20)
Page 9
December 1990 9
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
DC CHARACTERISTICS FOR 74HCT
Voltages are referenced to GND (ground = 0 V)
Note to HCT types
1. The value of additional quiescent supply current (∆I
CC
) for a unit load of 1 is given here.
To determine ∆ICCper input, multiply this value by the unit load coefficient shown in the table below.
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
V
EE
(V)
VIOTHER+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
V
IH
HIGH level input
voltage
2.0 1.6 2.0 2.0 V 4.5
to
5.5
V
IL
LOW level input
voltage
1.2 0.8 0.8 0.8 V 4.5
to
5.5
±I
I
input leakage
current
0.1 1.0 1.0 µA 5.5 0 V
CC
or
GND
±I
S
analog switch
OFF-state
current per
channel
0.1 1.0 1.0 µA 10.0 0V
IH
or
V
IL
VS =
VCC− V
EE
Fig.10
±I
S
analog switch
OFF-state current
all channels
0.1 1.0 1.0 µA 10.0 0V
IH
or
V
IL
VS =
VCC− V
EE
Fig.10
±I
S
analog switch
ON-state current
0.1 1.0 1.0 µA 10.0 0V
IH
or
V
IL
VS =
VCC− V
EE
Fig.11
I
CC
quiescent supply
current
8.0
16.0
80.0
160.0
160.0
320.0
µA 5.5
5.0
0
−5.0
V
CC
or
GND
Vis=V
EE
or VCC;
Vos=
VCCor V
EE
∆I
CC
additional
quiescent supply
current per input
pin for unit load
coefficient is 1
(note 1)
100 360 450 490 µA 4.5
to
5.5
0 V
CC
−2.1
V
other
inputs at
VCCor
GND
INPUT UNIT LOAD COEFFICIENT
E1,E
2
S
n
LE
0.50
0.50
1.5
Page 10
December 1990 10
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r=tf
= 6 ns; CL= 50 pF
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
V
EE
(V)
OTHER+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
Visto V
os
5
4
12
8
15
10
18
12
ns 4.5
4.50−4.5
RL= ∞;
CL= 50 pF
(see Fig.18)
t
PZH
/ t
PZL
turn “ON” time
E1to V
os
262255
45
69
56
83
68
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PZH
/ t
PZL
turn “ON” time
E2to V
os
221850
40
63
50
75
60
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PZH
/ t
PZL
turn “ON” time
LE to V
os
211745
40
56
50
68
60
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PZH
/ t
PZL
turn “ON” time
Snto V
os
251950
45
63
56
75
68
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PHZ
/ t
PLZ
turn “OFF” time
E1to V
os
231950
40
63
50
75
60
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PHZ
/ t
PLZ
turn “OFF” time
E2to V
os
272350
40
63
50
75
60
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PHZ
/ t
PLZ
turn “OFF” time
LE to V
os
191940
40
50
50
60
60
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
PHZ
/ t
PLZ
turn “OFF” time
Snto V
os
222245
45
56
56
68
68
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.19)
t
su
set-up time
Snto LE
12157
9
15
19
18
22
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.20)
t
h
hold time
Snto LE
5
5
0
−2
5
5
5
5
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.20)
t
W
LE minimum pulse
width HIGH
16163
5
20
20
24
24
ns 4.5
4.50−4.5
RL=1kΩ;
CL= 50 pF
(see Fig.20)
Page 11
December 1990 11
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
Fig.8 Test circuit for measuring RON.
Fig.9 Typical RONas a function of input voltage
Visfor Vis= 0 to VCC− VEE.
Fig.10 Test circuit for measuring OFF-state current.
Fig.11 Test circuit for measuring ON-state current.
Page 12
December 1990 12
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT
Recommended conditions and typical values
GND = 0 V; T
amb
=25°C
Notes to the AC characteristics
1. Adjust input voltage V
is
to 0 dBm level (0 dBm = 1 mW into 600 Ω).
2. Adjust input voltage Visto 0 dBm level at Vosfor 1 MHz (0 dBm = 1 mW into 50 Ω).
General note
Visis the input voltage at an nYnor nZ terminal, whichever is assigned as an input.
Vosis the output voltage at an nYnor nZ terminal, whichever is assigned as an output.
SYMBOL PARAMETER typ. UNIT
V
CC
(V)
V
EE
(V)
V
is(p-p)
(V)
CONDITIONS
sine-wave distortion
f = 1 kHz
0.04
0.02%%
2.25
4.5
−2.25
−4.5
4.0
8.0
R
L
= 10 kΩ;CL= 50 pF
(see Fig.14)
sine-wave distortion
f = 10 kHz
0.12
0.06%%
2.25
4.5
−2.25
−4.5
4.0
8.0
R
L
= 10 kΩ;CL= 50 pF
(see Fig.14)
switch “OFF” signal
feed-through
−50
−50dBdB
2.25
4.5
−2.25
−4.5
note 1 R
L
= 600 Ω;CL= 50 pF
f = 1 MHz (see Figs 12 and 15)
crosstalk between
any two switches/
multiplexers
−60
−60dBdB
2.25
4.5
−2.25
−4.5
note 1 R
L
= 600 Ω;CL= 50 pF;
f = 1 MHz (see Fig.16)
V
(p−p)
crosstalk voltage between
control and any switch
(peak-to-peak value)
110
220mVmV
4.5
4.50−4.5
RL= 600 Ω;CL= 50 pF;
f = 1 MHz (E1,E2or Sn,
square-wave between
VCCand GND, tr=tf= 6 ns)
(see Fig.17)
f
max
minimum frequency response
(−3dB)
160
170
MHz
MHz
2.25
4.5
−2.25
−4.5
note 2 RL=50Ω;CL= 10 pF
(see Figs 13 and 14)
C
S
maximum switch capacitance
independent (Y)
common (Z)
5
12pFpF
Fig.12 Typical switch “OFF” signal feed-through as a function of frequency.
Test conditions:
V
CC
= 4.5 V; GND = 0 V; VEE= − 4.5 V;
R
L
=50Ω;R
source
=1 kΩ.
Page 13
December 1990 13
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
Fig.13 Typical frequency response.
Test conditions:
V
CC
= 4.5 V; GND = 0 V; VEE= − 4.5 V;
R
L
=50Ω;R
source
=1 kΩ.
Fig.14 Test circuit for measuring sine-wave
distortion and minimum frequency
response.
Fig.15 Test circuit for measuring switch
“OFF” signal feed-through.
Fig.16 Test circuits for measuring crosstalk between any two switches/multiplexers.
(a) = channel ON condition (b) channel OFF condition.
Fig.17 Test circuit for measuring crosstalk between control and any switch.
The crosstalk is defined as follows
(oscilloscope output):
Page 14
December 1990 14
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
AC WAVEFORMS
Fig.18 Waveforms showing the input (Vis)to
output (Vos) propagation delays.
Fig.19 Waveforms showing the turn-ON and
turn-OFF times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT : V
M
= 1.3 V; VI= GND to 3 V.
Fig.20 Waveforms showing the set-up and hold
times from Sn inputs to LE input, and
minimum pulse width of LE.
(1) HC : VM= 50%; VI= GND to VCC.
HCT : V
M
= 1.3 V; VI= GND to 3 V.
Page 15
December 1990 15
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
TEST CIRCUIT AND WAVEFORMS
Fig.21 Test circuit for measuring AC performance.
Conditions
TEST SWITCH V
is
t
PZH
t
PZL
t
PHZ
t
PLZ
others
V
EE
V
CC
V
EE
V
CC
open
V
CC
V
EE
V
CC
V
EE
pulse
FAMILY AMPLITUDE V
M
tr;t
f
f
max
;
PULSE WIDTH
OTHER
74HC V
CC
50% < 2 ns 6 ns
74HCT 3.0 V 1.3 V < 2 ns 6 ns
C
L
= load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
R
T
= termination resistance should be equal to the output impedance ZOof the pulse generator.
t
r
=tf= 6 ns; when measuring f
max
, there is no constraint on tr, tfwith 50% duty factor.
Fig.22 Input pulse definitions.
Conditions
TEST SWITCH V
is
t
PZH
t
PZL
t
PHZ
t
PLZ
others
V
EE
V
CC
V
EE
V
CC
open
V
CC
V
EE
V
CC
V
EE
pulse
FAMILY AMPLITUDE V
M
tr;t
f
f
max
;
PULSE WIDTH
OTHER
74HC V
CC
50% < 2 ns 6 ns
74HCT 3.0 V 1.3 V < 2 ns 6 ns
C
L
= load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values).
R
T
= termination resistance should be equal to the output impedance ZOof the pulse generator.
t
r
=tf= 6 ns; when measuring f
max
, there is no constraint on tr, tfwith 50% duty factor.
Page 16
December 1990 16
Philips Semiconductors Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
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