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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4075
Triple 3-input OR gate
Product specification
File under Integrated Circuits, IC06
December 1990
Page 2
Philips Semiconductors Product specification
Triple 3-input OR gate 74HC/HCT4075
FEATURES
• Output capability: standard
• ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT4075 are high-speed Si-gate CMOS
devices and are pin compatible with the “4075” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4075 provide the 3-input OR function.
QUICK REFERENCE DATA
GND = 0 V; T
= 25 °C; tr= tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
C
C
I
PD
/ t
PLH
propagation delay nA, nB, nC to nY CL= 15 pF; VCC= 5 V 8 10 ns
input capacitance 3.5 3.5 pF
power dissipation capacitance per gate notes 1 and 2 28 32 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW):
PD
PD= CPD× V
2
× fi+∑(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
TYPICAL
UNIT
HC HCT
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
December 1990 2
.
Page 3
Philips Semiconductors Product specification
Triple 3-input OR gate 74HC/HCT4075
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
3, 1, 11 1A to 3A data inputs
4, 2, 12 1B to 3B data inputs
5, 8, 13 1C to 3C data inputs
6, 9, 10 1Y to 3Y data outputs
7 GND ground (0 V)
14 V
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUTS OUTPUT
nA nB nC nY
L
H
X
X
Notes
1. H = HIGH voltage level
Fig.4 Functional diagram. Fig.5 Logic diagram (one gate).
December 1990 3
L
X
H
X
L = LOW voltage level
X = don’t care
L
X
X
H
L
H
H
H
Page 4
Philips Semiconductors Product specification
Triple 3-input OR gate 74HC/HCT4075
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
Output capability: standard
ICCcategory: SSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
= tf= 6 ns; CL= 50 pF
r
SYMBOL PARAMETER
t
PHL
/ t
propagation delay
PLH
nA, nB, nC to nY
t
THL
/ t
output transition time 19
TLH
(°C)
T
amb
74HC
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
28
10
8
7
6
100
20
17
75
15
13
125
25
21
95
19
16
150
30
26
110
22
19
.
UNIT
ns 2.0
ns 2.0
TEST CONDITIONS
WAVEFORMS
V
CC
(V)
Fig.6
4.5
6.0
Fig.6
4.5
6.0
December 1990 4
Page 5
Philips Semiconductors Product specification
Triple 3-input OR gate 74HC/HCT4075
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
ICCcategory: SSI
Note to HCT types
The value of additional quiescent supply current (∆I
) for a unit load of 1 is given in the family specifications.
CC
To determine ∆ICCper input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
nA, nB, nC 1.50
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr= tf= 6 ns; CL= 50 pF
T
amb
(°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
+25 −40 to +85 −40 to +125
UNIT
V
(V)
CC
min. typ. max. min. max. min. max.
t
PHL
/ t
propagation delay
PLH
12 24 30 36 ns 4.5 Fig.6
nA, nB, nC to nY
t
THL
/ t
output transition time 7 15 19 22 ns 4.5 Fig.6
TLH
WAVEFORMS
AC WAVEFORMS
(1) HC : VM= 50%; VI= GND to VCC.
HCT: V
= 1.3 V; VI= GND to 3 V.
M
Fig.6 Waveforms showing the input (nA, nB, nC) to output (nY) propagation delays and the output transition times.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
December 1990 5
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