Datasheet 74HCT4016N, 74HCT4016D, 74HC4016U, 74HC4016PW, 74HC4016N Datasheet (Philips)

DATA SH EET

Product specification
File under Integrated Circuits, IC06

December 1990

INTEGRATED CIRCUITS

74HC/HCT4016

Quad bilateral switches

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

December 1990 2

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

FEATURES

• Low “ON” resistance:
160 Ω (typ.) at VCC= 4.5 V
120 Ω (typ.) at VCC= 6.0 V
80 Ω (typ.) at VCC= 9.0 V

• Individual switch controls

• Typical “break before make” built in

• Output capability: non-standard

• ICC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT4016 are high-speed Si-gate CMOS
devices and are pin compatible with the “4016” of the

“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.

The 74HC/HCT4016 have four independent analog
switches (transmission gates).
Each switch has two input/output terminals (Y

n,Zn

) and an
active HIGH enable input (En). When Enis connected to
VCC, a low bidirectional path between Ynand Znis
established (ON condition). When Enis connected to
ground (GND), the switch is disabled and a high
impedance between Ynand Znis established (OFF
condition).

Current through a switch will not cause additional
VCCcurrent provided the voltage at the terminals of the
switch is maintained within the supply voltage range;
VCC>> (VY,VZ) >> GND. Inputs Ynand Znare electrically
equivalent terminals.

QUICK REFERENCE DATA

GND = 0 V; T

amb

= 25 °C; tr= tf= 6 ns

Notes

1. C

PD

is used to determine the dynamic power dissipation (PDin µW):

PD= CPD× V

CC

2

× fi+∑{(CL+CS)×V

CC

2

× fo} where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ {(CL+ CS) × V

CC

2

× fo} = sum of outputs

CL= output load capacitance in pF
CS= max. switch capacitance in pF

VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”

.

SYMBOL PARAMETER CONDITIONS

TYPICAL

UNIT

HC HCT

t

PZH

/ t

PZL

turn “ON” time Ento V

OS

CL= 15 pF; RL=1 kΩ;
VCC= 5 V

16 17 ns

t

PHZ

/ t

PLZ

turn “OFF” time Ento V

OS

14 20 ns

C

I

input capacitance 3.5 3.5 pF

C

PD

power dissipation capacitance per switch notes 1 and 2 12 12 pF

C

S

max. switch capacitance 5 5 pF

December 1990 3

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1, 4, 8, 11 Y

0

to Y

3

independent inputs/outputs
7 GND ground (0 V)
2, 3, 9, 10 Z

0

to Z

3

independent inputs/outputs
13, 5, 6, 12 E

0

to E

3

enable inputs (active HIGH)
14 V

CC

positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

(a) (b)

December 1990 4

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

FUNCTION TABLE

Notes

1. H = HIGH voltage level
L = LOW voltage level

INPUT

E

n

CHANNEL

IMPEDANCE

L
H

high

low

Fig.4 Functional diagram.

APPLICATIONS

• Signal gating

• Modulation

• Demodulation

• Chopper

Fig.5 Schematic diagram (one switch).

December 1990 5

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

RATINGS

Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to GND (ground = 0 V)

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS

V

CC

DC supply voltage −0.5 +11.0 V

±I

IK

DC digital input diode current 20 mA for VI<−0.5 V or VI> VCC+ 0.5 V

±I

SK

DC switch diode current 20 mA for VS<−0.5 V or VS> VCC+ 0.5 V

±I

S

DC switch current 25 mA for −0.5 V < VS< VCC+ 0.5 V

±I

CC

; ±I

GND

DC VCCor GND current 50 mA

T

stg

storage temperature range −65 +150 °C

P

tot

power dissipation per package for temperature range: −40 to +125 °C

74HC/HCT
plastic DIL 750 mW above +70 °C: derate linearly with 12 mW/K
plastic mini-pack (SO) 500 mW above +70 °C: derate linearly with 8 mW/K

P

S

power dissipation per switch 100 mW

SYMBOL PARAMETER

74HC 74HCT

UNIT CONDITIONS

min. typ. max. min. typ. max.

V

CC

DC supply voltage 2.0 5.0 10.0 4.5 5.0 5.5 V

V

I

DC input voltage range GND V

CC

GND V

CC

V

V

S

DC switch voltage range GND V

CC

GND V

CC

V

T

amb

operating ambient temperature range −40 +85 −40 +85 °C

see DC and AC
CHARACTERIS­TICS

T

amb

operating ambient temperature range −40 +125 −40 +125 °C

1000 V

CC

= 2.0 V

t

r,tf

input rise and fall times 6.0 500

400
250

6.0 500 ns VCC= 4.5 V
VCC= 6.0 V
VCC= 10.0 V

December 1990 6

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

DC CHARACTERISTICS FOR 74HC/HCT

For 74HC: V

CC

= 2.0, 4.5, 6.0 and 9.0 V

For 74HCT: V

CC

= 4.5 V

Notes to the DC Characteristics

1. At supply voltages approaching 2.0 V the analog switch ON-resistance becomes extremely non-linear. Therefore it
is recommended that these devices be used to transmit digital signals only, when using these supply voltages.

2. For test circuit measuring R

ON

see Fig.6.

SYMBOL PARAMETER

T

amb

(°C)

UNIT

TEST CONDITIONS

74HC/HCT

V

CC

(V)

I

S

(µA)

V

is

V

I

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

R

ON

ON resistance (peak) −

160
120
85

−

320
240
170

−

400
300
213

−

480
360
255

Ω
Ω
Ω
Ω

2.0

4.5

6.0

9.0

100
1000
1000
1000

V

CC

to
GND

V

IH

or
V

IL

R

ON

ON resistance (rail) 160

80
70
60

−

160
140
120

−

200
175
150

−

240
210
180

Ω
Ω
Ω
Ω

2.0

4.5

6.0

9.0

100
1000
1000
1000

GND V

IH

or
V

IL

R

ON

ON resistance (rail) 170

90
80
65

−

180
160
135

−

225
200
170

−

270
240
205

Ω
Ω
Ω
Ω

2.0

4.5

6.0

9.0

100
1000
1000
1000

V

CCVIH

or
V

IL

∆R

ON

maximum ∆ON
resistance between
any two channels

−

16
12
9

Ω
Ω
Ω
Ω

2.0

4.5

6.0

9.0

V

CC

to
GND

V

IH

or
V

IL

Fig.6 Test circuit for measuring RON. Fig.7 Test circuit for measuring OFF-state current.

December 1990 7

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

Fig.8 Test circuit for measuring ON-state current.

Fig.9 Typical RONas a function of input voltage Visfor Vis= 0 to VCC.

December 1990 8

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

DC CHARACTERISTICS FOR 74HC

Voltages are referenced to GND (ground = 0 V)

AC CHARACTERISTICS FOR 74HC

GND = 0 V; tr=tf= 6 ns; CL= 50 pF

SYMBOL PARAMETER

T

amb

(°C)

UNIT

TEST CONDITIONS

74HC

V

CC

(V)

V

I

OTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

V

IH

HIGH level input
voltage

1.5

3.15

4.2

6.3

1.2

2.4

3.2

4.3

1.5

3.15

4.2

6.3

1.5

3.15

4.2

6.3

V 2.0

4.5

6.0

9.0

V

IL

LOW level input
voltage

0.8

2.1

2.8

4.3

0.50

1.35

1.80

2.70

0.50

1.35

1.80

2.70

0.50

1.35

1.80

2.70

V 2.0

4.5

6.0

9.0

±I

I

input leakage
current

0.1

0.2

1.0

2.0

1.0

2.0

µA 6.0

10.0

V

CC

or
GND

±I

S

analog switch
OFF-state current
per channel

0.1 1.0 1.0 µA 10.0 V

IH

or
V

IL

VS =
VCC− GND
(see Fig.7)

±I

S

analog switch
ON-state current

0.1 1.0 1.0 µA 10.0 V

IH

or
V

IL

VS =
VCC− GND
(see Fig.8)

I

CC

quiescent supply
current

2.0

4.0

20.0

40.0

40.0

80.0

µA 6.0

10.0

V

CC

or
GND

Vis= GND or
VCC;Vos=
VCCor GND

SYMBOL PARAMETER

T

amb

(°C)

UNIT

TEST CONDITIONS

74HC

V

CC

(V)

OTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

t

PHL

/ t

PLH

propagation
delay

Visto V

os

17
6
5
4

60
12
10
8

75
15
13
10

90
18
15
12

ns 2.0

4.5

6.0

9.0

RL= ∞;CL= 50 pF
(see Fig.16)

t

PZH

/ t

PZL

turn “ON” time

Ento V

os

52
19
15
11

190
38
32
28

240
48
41
35

235
57
48
42

ns 2.0

4.5

6.0

9.0

RL=1 kΩ;CL= 50 pF
(see Figs 17 and 18)

t

PHZ

/ t

PLZ

turn “OFF” time

Ento V

os

47
17
14
13

145
29
25
22

180
36
31
28

220
44
38
33

ns 2.0

4.5

6.0

9.0

RL=1 kΩ;CL= 50 pF
(see Figs 17 and 18)

December 1990 9

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

DC CHARACTERISTICS FOR 74HCT

Voltages are referenced to GND (ground = 0 V)

Note

1. The value of additional quiescent supply current (∆I

CC

) for a unit load of 1 is given here.

To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

SYMBOL PARAMETER

T

amb

(°C)

UNIT

TEST CONDITIONS

74HCT

V

CC

(V)

V

I

OTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

V

IH

HIGH level input
voltage

2.0 1.6 2.0 2.0 V 4.5
to

5.5

V

IL

LOW level input
voltage

1.2 0.8 0.8 0.8 V 4.5
to

5.5

±I

I

input leakage
current

0.1 1.0 1.0 µA 5.5 V

CC

or
GND

±I

S

analog switch
OFF-state current
per channel

0.1 1.0 1.0 µA 5.5 V

IH

or
V

IL

VS =
VCC− GND
(see Fig.7)

±I

S

analog switch
ON-state current

0.1 1.0 1.0 µA 5.5 V

IH

or
V

IL

VS =
VCC− GND
(see Fig.8)

I

CC

quiescent supply
current

2.0 20.0 40.0 µA 4.5
to

5.5

V

CC

or
GND

Vis= GND or
VCC;Vos=
VCCor GND

∆I

CC

additional quiescent
supply current per
input pin for unit
load coefficient is 1
(note 1)

100 360 450 490 µA 4.5

to

5.5

V

CC

−2.1V

other inputs
at VCCor
GND

INPUT UNIT LOAD COEFFICIENT

E

N

1.00

December 1990 10

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; t

r=tf

= 6 ns; CL= 50 pF

ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT
Recommended conditions and typical values

GND = 0 V; t

r=tf

= 6 ns

Notes

1. V

is

is the input voltage at a Ynor Znterminal, whichever is assigned as an input.

2. Vosis the output voltage at a Ynor Znterminal, whichever is assigned as an output.

3. Adjust input voltage Visto 0 dBm level (0 dBm = 1 mW into 600 Ω).

4. Adjust input voltage Visto 0 dBm level at Vosfor 1 MHz (0 dBm = 1 mW into 50 Ω).

SYMBOL PARAMETER

T

amb

(°C)

UNIT

TEST CONDITIONS

74HCT

V

CC

(V)

OTHER

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

t

PHL

/ t

PLH

propagation delay

Visto V

os

6 12 15 18 ns 4.5 RL= ∞;CL= 50 pF

(see Fig.16)

t

PZH

turn “ON” time

Ento V

os

19 35 44 53 ns 4.5 RL=1 kΩ;CL= 50 pF

(see Figs 17 and 18)

t

PZL

turn “ON” time

Ento V

os

20 35 44 53 ns 4.5 RL=1 kΩ;CL= 50 pF

(see Figs 17 and 18)

t

PHZ

/ t

PLZ

turn “OFF” time

Ento V

os

23 35 44 53 ns 4.5 RL=1 kΩ;CL= 50 pF

(see Figs 17 and 18)

SYMBOL PARAMETER typ. UNIT

V

CC

(V)

V

is(p-p)

(V)

CONDITIONS

sine-wave distortion

f = 1 kHz

0.80

0.40

%
%

4.5

9.0

4.0

8.0

R

L

= 10 kΩ;CL= 50 pF

(see Fig.14)

sine-wave distortion

f = 10 kHz

2.40

1.20

%
%

4.5

9.0

4.0

8.0

R

L

= 10 kΩ;CL= 50 pF

(see Fig.14)

switch “OFF” signal

feed-through

−50

−50

dB
dB

4.5

9.0

note 3 R

L

= 600 Ω;CL= 50 pF;

f = 1 MHz (see Figs 10 and 15)

crosstalk between

any two switches

−60

−60

dB
dB

4.5

9.0

note 3 R

L

= 600 Ω;CL= 50 pF;

f = 1 MHz (see Fig.12)

V

(p-p)

crosstalk voltage between

enable or address input
to any switch
(peak-to-peak value)

110
220

mV
mV

4.5

9.0

RL= 600 Ω;CL= 50 pF;
f = 1 MHz (En, square wave
between VCCand GND,
tr=tf= 6 ns) (see Fig.13)

f

max

minimum frequency response

(−3dB)

150
160

MHz
MHz

4.5

9.0

note 4 RL=50Ω;CL= 10 pF

(see Figs 11 and 14)

C

S

maximum switch capacitance 5 pF

December 1990 11

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

Fig.10 Typical switch “OFF” signal feed-through as a function of frequency.

Test conditions:
V

CC

= 4.5 V; GND = 0 V;

R

L

=50Ω;R

source

=1 kΩ.

Fig.11 Typical frequency response.

Test conditions:
V

CC

= 4.5 V; GND = 0 V;

R

L

=50Ω;R

source

=1 kΩ.

December 1990 12

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

Fig.12 Test circuit for measuring crosstalk between any two switches.

(a) channel ON condition; (b) channel OFF condition.

Fig.13 Test circuit for measuring crosstalk between control and any switch.

The crosstalk is defined as follows
(oscilloscope output):

Fig.14 Test circuit for measuring sine-wave distortion and minimum frequency response.

Fig.15 Test circuit for measuring switch “OFF” signal feed-through.

December 1990 13

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

AC WAVEFORMS

Fig.16 Waveforms showing the input (Vis) to output (Vos) propagation delays.

(1) HC : VM= 50%; VI= GND to VCC.

HCT: V

M

= 1.3 V; VI= GND to 3 V.

Fig.17 Waveforms showing the turn-ON and turn-OFF times.

(1) HC : VM= 50%; VI= GND to VCC.

HCT: V

M

= 1.3 V; VI= GND to 3 V.

December 1990 14

Philips Semiconductors Product specification

Quad bilateral switches 74HC/HCT4016

TEST CIRCUIT AND WAVEFORMS

PACKAGE OUTLINES

See

“74HC/HCT/HCU/HCMOS Logic Package Outlines”

.

Fig.18 Test circuit for measuring AC performance.

Conditions

TEST SWITCH V

is

t

PZH

t

PZL

t

PHZ

t

PLZ

others

GND
V

CC

GND
V

CC

open

V

CC

GND
V

CC

GND
pulse

CL= load capacitance including jig and probe capacitance

(see AC CHARACTERISTICS for values).

R

T

= termination resistance should be equal to the output

impedance Z

O

of the pulse generator.

t

r=tf

= 6 ns; when measuring f

max

, there is no constraint

t

r,tf

with 50% duty factor.

FAMILY AMPLITUDE V

M

tr;t

f

f

max

;

PULSE WIDTH

OTHER

74HC
74HCT

V

CC

3.0 V

50%

1.3 V

< 2 ns
< 2 ns

6 ns
6 ns

Fig.19 Input pulse definitions.

FAMILY AMPLITUDE V

M

tr;t

f

f

max

;

PULSE WIDTH

OTHER

74HC
74HCT

V

CC

3.0 V

50%

1.3 V

< 2 ns
< 2 ns

6 ns
6 ns

CL= load capacitance including jig and probe capacitance

(see AC CHARACTERISTICS for values).

R

T

= termination resistance should be equal to the output

impedance Z

O

of the pulse generator.

t

r=tf

= 6 ns; when measuring f

max

, there is no constraint

t

r,tf

with 50% duty factor.