Datasheet 74HCT4002N, 74HCT4002DB, 74HCT4002D, 74HCT4002U, 74HC4002U Datasheet (Philips)

DATA SH EET

Product specification
File under Integrated Circuits, IC06

December 1990

INTEGRATED CIRCUITS

74HC/HCT4002

Dual 4-input NOR gate

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

December 1990 2

Philips Semiconductors Product specification

Dual 4-input NOR gate 74HC/HCT4002

FEATURES

• Output capability: standard

• ICC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT4002 are high-speed Si-gate CMOS devices and are pin compatible with “4002” of the “4000B” series.
They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT4002 provide the 4-input NOR function.

QUICK REFERENCE DATA

GND = 0 V; T

amb

=25°C; tr=tf= 6 ns

Notes

1. C

PD

is used to determine the dynamic power dissipation (PD in µW):

PD=CPD× V

CC

2

× fi+∑(CL× V

CC

2

× fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V

CC

2

× fo) = sum of outputs
CL= output load capacitance in pF
VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”

.

SYMBOL PARAMETER CONDITIONS

TYPICAL

UNIT

HC HCT

t

PHL

/ t

PLH

propagation delay nA, nB, nC, nD to nY CL= 15 pF; VCC= 5 V 9 11 ns

C

I

input capacitance 3.5 3.5 pF

C

PD

power dissipation capacitance per gate notes 1 and 2 16 22 pF

December 1990 3

Philips Semiconductors Product specification

Dual 4-input NOR gate 74HC/HCT4002

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

1, 13 1Y, 2Y data outputs
2, 9 1A, 2A data inputs
3, 10 1B, 2B data inputs
4, 11 1C, 2C data inputs
5, 12 1D, 2D data inputs
6, 8 n.c. not connected
7 GND ground (0 V)
14 V

CC

positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

December 1990 4

Philips Semiconductors Product specification

Dual 4-input NOR gate 74HC/HCT4002

Fig.4 Functional diagram.

FUNCTION TABLE

Notes

1. H = HIGH voltage level
L = LOW voltage level
X = don’t care

INPUTS OUTPUT

nA nB nC nD nY

LLLL H

H
X
X
X

X
H
X
X

X
X
H
X

X
X
X
H

L
L
L
L

Fig.5 Logic diagram 74HC4002 (one gate). Fig.6 Logic diagram 74HCT4002 (one gate).

December 1990 5

Philips Semiconductors Product specification

Dual 4-input NOR gate 74HC/HCT4002

DC CHARACTERISTICS FOR 74HC

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

.

Out put capability: standard
ICC category: SSI

AC CHARACTERISTICS FOR 74HC

GND = 0 V; t

r=tf

= 6 ns; CL= 50 pF

SYMBOL PARAMETER

T

amb

(°C)

UNIT

TEST CONDITIONS

74HC

V

CC

(V)

WAVEFORMS

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

t

PHL

/ t

PLH

propagation delay

nA, nB, nC, nD to nY

30
11
9

100
20
17

125
25
21

150
30
26

ns 2.0

4.5

6.0

Fig.7

t

THL

/ t

TLH

output transition time 19

7
6

75
15
13

95
19
16

110
22
19

ns 2.0

4.5

6.0

Fig.7

December 1990 6

Philips Semiconductors Product specification

Dual 4-input NOR gate 74HC/HCT4002

DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

.

Output capability: standard
ICC category: SSI

Note to HCT types

The value of additional quiescent supply current (∆I

CC

) for a unit load of 1 is given in the family specifications.

To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; tr=tf= 6 ns; CL= 50 pF

AC WAVEFORMS

PACKAGE OUTLINES

See

“74HC/HCT/HCU/HCMOS Logic Package Outlines”

.

INPUT UNIT LOAD COEFFICIENT

nA, nB, nC, nD 0.45

SYMBOL PARAMETER

T

amb

(°C)

UNIT

TEST CONDITIONS

74HCT

V

CC

(V)

WAVEFORMS

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

t

PHL

/ t

PLH

propagation delay

nA, nB, nC, nD to nY

13 22 28 33 ns 4.5 Fig.7

t

THL

/ t

TLH

output transition time 7 15 19 22 ns 4.5 Fig.7

Fig.7 Waveforms showing the input (nA, nB, nC, nD) to output (nY) propagation delays and the output transition

times.

(1) HC : VM= 50%; VI= GND to VCC.

HCT: V

M

= 1.3 V; VI= GND to 3 V.