Datasheet 74HC1G08, 74HCT1G08 Datasheet (Philips)

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INTEGRATED CIRCUITS

DATA SH EET

74HC1G08; 74HCT1G08

2-input AND gate

Product specification
Supersedes data of 2001 Mar 02

2002 May 17

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

FEATURES

• Wide supply voltage range from 2.0 to 6.0 V

• Symmetrical output impedance

• High noise immunity

• Low power dissipation

DESCRIPTION

The 74HC1G/HCT1G08 is a high-speed Si-gate CMOS
device.

The 74HC1G/HCT1G08 provides the 2-input AND
function. Thestandard output currents are1⁄2compared to
the 74HC/HCT08.

• Balanced propagation delays

• Very small 5 pins package

• Output capability: standard.

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf≤6.0 ns.

amb

SYMBOL PARAMETER CONDITIONS

t

PHL/tPLH

C

I

C

PD

propagation delay A and B to Y CL= 15 pF; VCC= 5 V 7 11 ns
input capacitance 1.5 1.5 pF
power dissipation capacitance notes 1 and 2 19 21 pF

Notes

1. C

is used to determine the dynamic power dissipation (PDin µW).

PD

PD=CPD× V

2

× fi+ ∑ (CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz;
fo= output frequency in MHz;

= output load capacitance in pF;

C

L

VCC= supply voltage in Volts;
∑ (CL× V

2

× fo) = sum of outputs.

CC

2. For HC1G the condition is VI= GND to VCC.
For HCT1G the condition is VI= GND to VCC− 1.5 V.

TYPICAL

UNIT

HC1G HCT1G

FUNCTION TABLE

See note 1.

INPUTS OUTPUT

ABY

LLL

LHL
HLL
HHH

Note

1. H = HIGH voltage level;
L = LOW voltage level.

2002 May 17 2

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

74HC1G08GW −40 to +125 °C 5 SC-88A plastic SOT353 HE
74HCT1G08GW −40 to +125 °C 5 SC-88A plastic SOT353 TE
74HC1G08GV −40 to +125 °C 5 SC-74A plastic SOT753 H08
74HCT1G08GV −40 to +125 °C 5 SC-74A plastic SOT753 T08

PINNING

PIN SYMBOL DESCRIPTION

1 B data input B
2 A data input A
3 GND ground (0 V)
4 Y data output Y
5V

TEMPERATURE

RANGE

CC

PINS PACKAGE MATERIAL CODE MARKING

supply voltage

handbook, halfpage

handbook, halfpage

GND

B

1

A

2

08

3

MNA112

V

5

Y

4

Fig.1 Pin configuration.

1
2

&

MNA114

4

CC

handbook, halfpage

handbook, halfpage

B

A

1

B

2

A

MNA113

Fig.2 Logic symbol.

4

Y

Y

MNA115

Fig.3 IEC logic symbol.

2002 May 17 3

Fig.4 Logic diagram.

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS

UNIT

MIN. TYP. MAX. MIN. TYP. MAX.

74HC1G04 74HCT1G04

V

CC

V

I

V

O

T

amb

supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
input voltage 0 − V
output voltage 0 − V
operating ambient

temperature

see DC and AC
characteristics per

−40 +25 +125 −40 +25 +125 °C

0 − V

CC

0 − V

CC

CC
CC

V
V

device

t

r,tf

input rise and fall times VCC= 2.0 V −−1000 −−−ns

= 4.5 V −−500 −−500 ns

V

CC

V

= 6.0 V −−400 −−−ns

CC

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134);voltages are referenced to GND (ground = 0 V).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

I

IK

I

OK

I

O

I

CC

T

stg

P

D

supply voltage −0.5 +7.0 V
input diode current VI< −0.5 Vor VI>VCC+ 0.5 V; note 1 −±20 mA
output diode current VO< −0.5 Vor VO>VCC+ 0.5 V; note 1 −±20 mA
output source or sink current −0.5V<VO<VCC+ 0.5 V; note 1 −±12.5 mA
VCC or GND current note 1 −±25 mA
storage temperature −65 +150 °C
power dissipation per package for temperature range from −40 to +125 °C;

− 200 mW

note 2

Notes

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. Above 55 °C the value of P

derates linearly with 2.5 mW/K.

D

2002 May 17 4

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

DC CHARACTERISTICS
Family 74HC1G

At recommended operating conditions; voltages are referenced to GND (ground=0V).

SYMBOL PARAMETER

V

IH

V

IL

V

OH

HIGH-levelinput voltage 2.0 1.5 1.2 − 1.5 − V

LOW-level input voltage 2.0 − 0.8 0.5 − 0.5 V

HIGH-level output
voltage

V

OL

LOW-level output
voltage

I

LI

I

CC

input leakage current VI=VCCor GND 6.0 −−1.0 − 1.0 µA
quiescent supply

current

TEST CONDITIONS T

−40 to +85 −40 to +125

OTHER VCC (V)

MIN. TYP.

4.5 3.15 2.4 − 3.15 − V

6.0 4.2 3.2 − 4.2 − V

4.5 − 2.1 1.35 − 1.35 V

6.0 − 2.8 1.8 − 1.8 V

VI=VIHor VIL;

2.0 1.9 2.0 − 1.9 − V

IO= −20 µA
V

I=VIH

or VIL;

4.5 4.4 4.5 − 4.4 − V

IO= −20 µA
V

I=VIH

or VIL;

6.0 5.9 6.0 − 5.9 − V

IO= −20 µA
V

I=VIH

or VIL;

4.5 4.13 4.32 − 3.7 − V

IO= −2.0 mA
V

I=VIH

or VIL;

6.0 5.63 5.81 − 5.2 − V

IO= −2.6 mA
VI=VIHor VIL;

2.0 − 0 0.1 − 0.1 V

IO=20µA
V

I=VIH

or VIL;

4.5 − 0 0.1 − 0.1 V

IO=20µA
V

I=VIH

or VIL;

6.0 − 0 0.1 − 0.1 V

IO=20µA
V

I=VIH

or VIL;

4.5 − 0.15 0.33 − 0.4 V

IO= 2.0 mA
V

I=VIH

or VIL;

6.0 − 0.16 0.33 − 0.4 V

IO= 2.6 mA

VI=VCCor GND;

6.0 −−10 − 20 µA

IO=0

(°C)

amb

(1)

MAX. MIN. MAX.

UNIT

Note

1. All typical values are measured at T

amb

=25°C.

2002 May 17 5

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

Family 74HCT1G

At recommended operating conditions; voltages are referenced to GND (ground=0V).

SYMBOL PARAMETER

V

IH

HIGH-level input
voltage

V

IL

LOW-level input
voltage

V

OH

HIGH-level output
voltage

VI=VIHor VIL;
IO= −20 µA

V

I=VIH

IO= −2.0 mA

V

OL

LOW-level output
voltage

VI=VIHor VIL;
IO=20µA

V

I=VIH

IO= 2.0 mA
I
I

∆I

LI
CC

CC

input leakage current VI=VCCor GND 5.5 −−1.0 − 1.0 µA
quiescent supply

current
additional supply

current per input

VI=VCCor GND;

IO=0

VI=VCC− 2.1 V;

IO=0

Note

1. All typical values are measured at T

TEST CONDITIONS T

−40 to +85 −40 to +125

OTHER VCC (V)

MIN. TYP.

(1)

4.5 to 5.5 2.0 1.6 − 2.0 − V

4.5 to 5.5 − 1.2 0.8 − 0.8 V

4.5 4.4 4.5 − 4.4 − V

or VIL;

4.5 4.13 4.32 − 3.7 − V

4.5 − 0 0.1 − 0.1 V

or VIL;

4.5 − 0.15 0.33 − 0.4 V

5.5 −−10 − 20 µA

4.5 to 5.5 −−500 − 850 µA

=25°C.

amb

(°C)

amb

MAX. MIN. MAX.

UNIT

2002 May 17 6

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

AC CHARACTERISTICS
Type 74HC1G08

GND = 0 V; tr=tf≤6.0 ns; CL=50pF.

SYMBOL PARAMETER

t

PHL/tPLH

propagation delay

see Figs 5 and 6 2.0 − 25 115 − 135 ns

A and B to Y

Note

1. All typical values are measured at T

Type 74HCT1G08

GND = 0 V; t

≤6.0 ns; CL=50pF.

r=tf

SYMBOL PARAMETER

t

PHL/tPLH

propagation delay

see Figs 5 and 6 4.5 − 11 23 − 27 ns

A and B to Y

Note

1. All typical values are measured at T

TEST CONDITIONS T

−40 to +85 −40 to +125

WAVEFORMS VCC (V)

MIN. TYP.

4.5 − 923−27 ns

6.0 − 820−23 ns

=25°C.

amb

TEST CONDITIONS T

−40 to +85 −40 to +125

WAVEFORMS VCC (V)

MIN. TYP.

=25°C.

amb

(°C)

amb

(1)

MAX. MIN. MAX.

(°C)

amB

(1)

MAX. MIN. MAX.

UNIT

UNIT

2002 May 17 7

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

AC WAVEFORMS

handbook, halfpage

A, B input

Y output

For HC1G08: VM= 50%; VI= GND to VCC.
For HCT1G08: VM= 1.3 V; VI= GND to 3.0 V.

V

M

t

PHL

V

M

Fig.5 The input (A and B) to output (Y)

propagation delays.

t

PLH

MNA116

handbook, halfpage

V

PULSE

GENERATOR

Definitions for test circuit:
CL= Load capacitance including jig and probe capacitance

(See “AC characteristics”).

= Termination resistance should be equal to the output

R

T

impedance Z

of the pulse generator.

o

I

V

CC

V

D.U.T.

R

T

O

Fig.6 Load circuitry for switching times.

C

L

MNA101

2002 May 17 8

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

PACKAGE OUTLINES

Plastic surface mounted package; 5 leads SOT353

D

y

45

132

e

1

e

b

p

wBM

A

A

1

E

H

E

detail X

Q

L

p

AB

X

v M

A

c

0 1 2 mm

scale

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm

A

1.1

0.8

OUTLINE

VERSION

SOT353

max

0.1

1

b

cD

p

0.30

0.25

0.20

0.10

IEC JEDEC EIAJ

2.2

1.8

(2)

E

1.35

1.3

1.15

REFERENCES

e

e

1

0.65

2002 May 17 9

H

2.2

2.0

L

Qywv

p

E

0.45

0.15

0.25

0.15

0.2 0.10.2

EUROPEAN

PROJECTION

ISSUE DATE

97-02-28SC-88A

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

Plastic surface mounted package; 5 leads SOT753

D

y

E

H

E

AB

X

v M

A

45

Q

A

A

1

c

132

L

p

3.1

2.7

b

p

wBM

0 1 2 mm

scale

H

e

E

1.7

0.95

1.3

REFERENCES

E

3.0

2.5

e

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm

A

0.100

1.1

0.013

0.9

OUTLINE
VERSION

SOT753 SC-74A

b

cD

p

1

0.40

0.26

0.25

0.10

IEC JEDEC JEITA

2002 May 17 10

L

Qywv

p

0.6

0.33

0.2

0.23

0.2 0.10.2

detail X

EUROPEAN

PROJECTION

ISSUE DATE

02-04-16

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

SOLDERING
Introduction to soldering surface mount packages

Thistext givesavery briefinsight to acomplex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering can still be used for
certainsurface mountICs,but itisnot suitableforfine pitch
SMDs. In these situations reflow soldering is
recommended.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuitboard byscreen printing, stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.

Wave soldering

Conventional single wave soldering is not recommended
forsurface mountdevices(SMDs) orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering isused the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wavewith high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackages withleadson foursides,the footprintmust
be placedat a 45° angleto the transport directionof the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and beforesoldering, thepackage must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2002 May 17 11

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

(1)

SOLDERING METHOD

WAVE REFLOW

(2)

BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable
HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN,

not suitable

(3)

suitable

HVSON, SMS

(4)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

, SO, SOJ suitable suitable

(4)(5)

suitable

(6)

suitable

Notes

1. Formore detailedinformation ontheBGA packagesrefer tothe

“(LF)BGAApplication Note

”(AN01026); ordera copy

from your Philips Semiconductors sales office.

2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit boardand the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.

4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

5. Wave solderingis suitable forLQFP, TQFP andQFP packages witha pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2002 May 17 12

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

DATA SHEET STATUS

PRODUCT

DATA SHEET STATUS

Objective data Development This data sheet contains data from the objective specification for product

Preliminary data Qualification This data sheet contains data from the preliminary specification.

Product data Production This data sheet contains data from the product specification. Philips

(1)

STATUS

(2)

DEFINITIONS

development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting valuesdefinition Limiting values givenare in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
atthese orat any otherconditions abovethosegiven inthe
Characteristics sectionsof the specification isnot implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentation orwarrantythat suchapplicationswill be
suitable for the specified use without further testing or
modification.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result inpersonal injury.Philips
Semiconductorscustomers usingorselling theseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuse ofanyof theseproducts,conveys nolicenceor title
under any patent, copyright, or mask work right to these
products,and makesno representationsorwarranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

2002 May 17 13

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

NOTES

2002 May 17 14

Philips Semiconductors Product specification

2-input AND gate 74HC1G08; 74HCT1G08

NOTES

2002 May 17 15

Philips Semiconductors – a w orldwide compan y

Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: [phone]
For sales offices addresses send e-mail to: [e-mail].

© Koninklijke Philips Electronics N.V. 2002
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in thisdocument does not form partof any quotation or contract,is believed to be accurateand reliable and may bechanged
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands 613508/03/pp16 Date of release: 2002 May 17 Document order number: 9397 750 09717

SCA74