TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC123AP,TC74HC123AF,TC74HC123AFN
Dual Retriggerable Monostable Multivibrator
The TC74HC123A is a high speed CMOS MONOSTABLE
MULTIVIBRATOR fabricated with silicon gate C
technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
There are two trigger inputs,
input (positive edge). These inputs are valid for a slow rise/fall
time signal (tr = tf = 1 s) as they are schmitt trigger inputs. This
device may also be triggered by using
edge).
After triggering, the output stays in a MONOSTABLE state for
a time period determined by the external resistor and capacitor
(Rx, Cx ). A low level at the
MONOSTABLE state, if a new trigger is applied, it extends the
MONOSTABLE period (retrigger mode).
Limits for Cx and Rx are:
External capacitor, Cx: No limit
External resistor, Rx: V
V
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
A input (negative edge), and B
CLR
CLR
input breaks this state. In the
= 2.0 V more than 5 kΩ
CC
≥ 3.0 V more than 1 kΩ
CC
2
MOS
input (positive
Features (Note)
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74HC123AP
TC74HC123AF
TC74HC123AFN
• High speed: t
• Low power dissipation
Standby state: I
Active state: I
• High noise immunity: V
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I
• Balanced propagation delays: t
• Wide operating voltage range: V
• Pin and function compatible with 74LS123
Note: In the case of using only one circuit, CLR should be tied to GND, Rx/Cx・Cx・Q・ Q should be tied to OPEN,
= 25 ns (typ.) at VCC = 5 V
pd
= 4 μA (max) at Ta = 25°C
CC
= 700 μA (max) at Ta = 25°C
CC
= V
NIH
the other inputs should be tied to V
= 28% VCC (min)
NIL
| = IOL = 4 mA (min)
OH
∼
t
−
pLH
pHL
(opr) = 2 to 6 V
CC
or GND.
CC
Weight
DIP16-P-300-2.54A : 1.00 g (typ.)
SOP16-P-300-1.27A : 0.18 g (typ.)
SOL16-P-150-1.27 : 0.13 g (typ.)
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2007-10-01
Page 2
Pin Assignment
IEC Logic Symbol
TC74HC123AP/AF/AFN
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2007-10-01
Page 3
Block Diagram (Note 1)(Note 2)
Note 1: Cx, Rx, Dx are external
capacitor, resistor, and diode, respectively.
Note 2: External clamping diode, Dx;
TC74HC123AP/AF/AFN
The external capacitor is charged to V
If the supply voltage is turned off, Cx is discharges mainly through the internal (parasitic) diode. If Cx is
sufficiently large and V
current or latch-up. If the capacitance of the supply voltage filter is large enough and V
in rush current is automatically limited and damage to the IC is avoided.
The maximum value of forward current through the parasitic diode is ±20 mA.
In the case of a large Cx, the limit of fall time of the supply voltage is determined as follows:
t
≥ (VCC − 0.7) Cx/20 mA
f
(tf is the time between the supply voltage turn off and the supply voltage reaching 0.4 VCC.)
In the event a system does not satisfy the above condition, an external clamping diode (Dx) is needed to
protect the IC from in rush current.
drops rapidly, there will be some possibility of damaging the IC through in rush
CC
level in the wait state, i.e. when no trigger is applied.
CC
CC
drops slowly, the
Truth Table
Inputs Outputs
A B CLR Q Q
H H Output Enable
X L H L H Inhibit
H X H L H Inhibit
L H Output Enable
L H Output Enable
X X L L H Inhibit
Function
X: Don’t care
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Page 4
System Diagram
TC74HC123AP/AF/AFN
V
CC
V
ref
Q
P
L H
C
1
V
ref
C
2
RX/CX
C
X
A
B
CLR
Timing Chart
Q
N
V
CC
R
QD
F/F
CK
Q
Q
Q
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Page 5
Functional Description
(1) Stand-by state
The external capacitor (Cx) is fully charged to V
triggering, the Q
comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off.
The total supply current is only leakage current.
(2)
Trigger operation
Trigger operation is effective in any of the following three cases. First, the condition where the
input is low, and the B input has a rising signal; second, where the B input is high, and the
has a falling signal; and third, where the
input has a rising signal.
After a trigger becomes effective, comparators C1 and C2 start operating, and Q
external capacitor discharges through Q
voltage level falls to the internal reference voltage Vref L, the output of C1 becomes low. The flip-flop
is then reset and Q
After Q
constant of external capacitor Cx and resistor Rx.
Upon triggering, output Q becomes high, following some delay time of the internal F/F and gates. It
stays high even if the voltage of Rx/Cx changes from falling to rising. When Rx/Cx reaches the
internal reference voltage Vref H, the output of C2 becomes low, the output Q goes low and C2 stops
its operation. That means, after triggering, when the voltage level of the Rx/Cx node reaches Vref H,
the IC returns to its MONOSTABLE state.
With large values of Cx and Rx, and ignoring the discharge time of the capacitor and internal
delays of the IC, the width of the output pulse, tw (OUT), is as follows:
(3)
Retrigger operation
When a new trigger is applied to either input
effective only if the IC is charging Cx. The voltage level of the Rx/Cx node then falls to Vref L level
again. Therefore the Q output stays high if the next trigger comes in before the time period set by Cx
and Rx.
If the new trigger is very close to previous trigger, such as an occurrence during the discharge cycle,
it will have no effect.
The minimum time for a trigger to be effective 2nd trigger, trr (Min.), depends on V
(4)
Reset operation
In normal operation, the
the Q output is held low and the trigger control F/F is reset. Also, Q
rapidly to V
This means if
turns off, the voltage at the Rx/Cx node starts rising at a rate determined by the time
N
tw (OUT)
= 1.0 Cx Rx
.
CC
TC74HC123AP/AF/AFN
in the stand-by state. That means, before
CC
and QN transistors which are connected to the Rx/Cx node are in the off state. Two
P
A input
A input is low and the B input is high, and the CLR
is turned on. The
N
. The voltage level at the Rx/Cx node drops. If the Rx/Cx
N
turns off. At that moment C1 stops but C2 continues operating.
N
A or B while in the MONOSTABLE state, it is
and Cx.
CC
CLR input is held high. If CLR is low, a trigger has no effect because
turns on and Cx is charged
P
CLR is set low, the IC goes into a wait state.
A
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Page 6
TC74HC123AP/AF/AFN
Absolute Maximum Ratings (Note 1)
Characteristics Symbol Rating Unit
Supply voltage range VCC −0.5 to 7 V
DC input voltage VIN −0.5 to VCC + 0.5 V
DC output voltage V
Input diode current IIK ±20 mA
Output diode current IOK ±20 mA
DC output current I
DC VCC/ground current ICC ±50 mA
Power dissipation PD 500 (DIP) (Note 2)/180 (SOP) mW
Storage temperature T
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
−0.5 to VCC + 0.5 V
OUT
±25 mA
OUT
−65 to 150 °C
stg
Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C shall be
applied until 300 mW.
Operating Ranges (Note 1)
Characteristics Symbol Rating Unit
Supply voltage VCC 2 to 6 V
Input voltage VIN 0 to V
Output voltage V
Operating temperature T
Input rise and fall time
(
CLR only)
External capacitor Cx No limitation (Note 2) F
External resistor Rx
0 to V
OUT
opr
0 to 1000 (V
, tf
t
r
0 to 500 (V
0 to 400 (V
≥5 k (V
≥1 k (V
CC
CC
−40 to 85 °C
= 2.0 V)
CC
= 4.5 V)
CC
= 6.0 V)
CC
= 2.0 V) (Note 2)
CC
≥ 3.0 V) (Note 2)
CC
Note 1: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
Note 2: The maximum allowable values of Cx and Rx are a function of leakage of capacitor Cx, the leakage of
TC74HC123A, and leakage due to board layout and surface resistance.
Susceptibility to externally induced noise signals may occur for Rx > 1 MΩ.
V
V
ns
Ω
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2007-10-01
Page 7
Electrical Characteristics
DC Characteristics
TC74HC123AP/AF/AFN
Characteristics Symbol
High-level input
voltage
Low-level input
voltage
High-level output
voltage
(Q,
)
Q
Low-level output
voltage
(Q,
)
Q
Input leakage
current
Rx/Cx terminal
off-state current
Quiescent supply
current
Active-state supply
current
(Note)
V
V
V
V
I
I
I
CC
I
CC
IH
IL
OH
OL
IN
IN
Test Condition Ta = 25°C Ta = −40 to 85°C
(V)
⎯
⎯
IOH =−20 μA
V
IN
= V
or V
IH
IL
IOH =−4 mA
I
=−5.2 mA
OH
IOL = 20 μA
V
IN
= V
or V
IH
IL
IOL = 4 mA
I
= 5.2 mA
OL
VIN = VCC or GND 6.0 ⎯ ⎯ ±0.1 ⎯±1.0μA
VIN = VCC or GND 6.0 ⎯ ⎯ ±0.1 ⎯±1.0μA
VIN = VCC or GND 6.0 ⎯ ⎯ 4.0 ⎯ 40.0μA
VIN = VCC or GND
Rx/Cx
= 0.5 V
CC
V
CC
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
Min Typ.Max Min Max
1.50
3.15
4.20
⎯
⎯
⎯
1.9
4.4
5.9
4.18
5.68
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
2.0
4.5
6.0
4.31
5.80
0.0
0.0
0.0
0.17
0.18
45
400
0.7
⎯
⎯
⎯
0.50
1.35
1.80
⎯
⎯
⎯
⎯
⎯
0.1
0.1
0.1
0.26
0.26
200
500
1.0
1.50
3.15
4.20
⎯
⎯
⎯
1.9
4.4
5.9
4.13
5.63
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
0.50
1.35
1.80
0.33
0.33
260
650
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
0.1
0.1
0.1
1.3
Unit
V
V
V
V
μA
μA
mA
Note: Per circuit
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2007-10-01
Page 8
TC74HC123AP/AF/AFN
Timing Requirements
Characteristics Symbol
Minimum pulse width
Minimum clear width t
Minimum retrigger time trr
(input: tr = tf = 6 ns)
AC Characteristics
Characteristics Symbol Test Condition Min Typ. MaxUnit
• The information contained herein is subject to change without notice.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
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set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
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Handbook” etc.
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responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
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TOSHIBA or the third parties.
20070701-EN GENERAL
• Please contact your sales representative for product-by-product details in this document regarding RoHS
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14
2007-10-01
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