Datasheet 74F37SJX, 74F37SJ, 74F37SCX, 74F37SC, 74F37PC Datasheet (Fairchild Semiconductor)

April 1988
Revised March 1999

74F37 Quad Two-Input NAND Buffer

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74F37
Quad Two-Input NAND Buffer

General Description

This device contains four independent gates, each of which
performs the logic NAND function.

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering cod e.

Logic Symbol

IEEE/IEC

Unit Loading/Fan Out

Connection Diagram

Function Table

H = HIGH Voltage Level
L = LOW Voltage Level

Order Number Package Number Package Description

74F37SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F37SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F37PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Pin Names Description

U.L.

Input I

IH/IIL

HIGH/LOW

Output I

OH/IOL

An, B

n

Inputs 1.0/2.0 20 µA/−1.2 mA

O

n

Outputs 600/106.6 (80) −12 mA/64 mA

(48 mA)

Inputs Output

ABO

LLH
LHH
HLH
HHL

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74F37

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absolute maximum ratings are values beyond which the device

may be damaged or have its useful life impaired. Functional operation
under these conditi ons is not implied.

Note 2: Either voltage limit or curren t limit is sufficient to protect in put s .

DC Electrical Characteristics

AC Electrical Characteristics

Storage Temperature −65°C to +150°C
Ambient Temperature under Bias −55°C to +125°C
Junction Temperature under Bias −55°C to +150°C
V

CC

Pin Potential to Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Output

in HIGH State (with V

CC

= 0V)

Standard Output −0.5V to V

CC

3-STATE Output −0.5V to +5.5V

Current Applied to Output

in LOW State (Max) twice the rated I

OL

(mA)

Free Air Ambient Temperature 0°C to +70°C
Supply Voltage +4.5V to +5.5V

Symbol Parameter Min Typ Max Units

V

CC

Conditions

V

IH

Input HIGH Voltage 2.0 V Recognized as a HIGH Signal

V

IL

Input LOW Voltage 0.8 V Recognized as a LOW Signal

V

CD

Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA

V

OH

Output HIGH 10% V

CC

2.4 IOH = −3 mA

Voltage 10% V

CC

2.0 V Min IOH = −15 mA

5% V

CC

2.7 IOH = −3 mA

V

OL

Output LOW 10% V

CC

0.55 V Min IOL = 64 mA

Voltage

I

IH

Input HIGH 5.0 µAMaxVIN = 2.7V
Current

I

BVI

Input HIGH Current 7.0 µAMaxVIN = 7.0V
Breakdown Test

I

CEX

Output HIGH 50 µAMaxV

OUT

= V

CC

Leakage Current

V

ID

Input Leakage 4.75 V 0.0 IID = 1.9 µA
Test All Other Pins Grounded

I

OD

Output Leakage 3.75 µA0.0V

IOD

= 150 mV

Circuit Current All Other Pins Grounded

I

IL

Input LOW Current −1.2 mA Max VIN = 0.5V

I

OS

Output Short-Circuit Current −100 −225 mA Max V

OUT

= 0V

I

CCH

Power Supply Current 3.7 6.0 mA Max VO = HIGH

I

CCL

Power Supply Current 28.0 33.0 mA Max VO = LOW

Symbol Parameter

TA = +25°CT

A

= 0°C to +70°C

Units

VCC = +5.0V CL = 50 pF

CL = 50 pF

Min Typ Max Min Max

t

PLH

Propagation Delay 2.0 3.2 5.5 1.5 6.5 ns

t

PHL

An, Bn to O

n

1.5 2.4 4.5 1.0 5.0

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74F37

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

74F37 Quad Two-Input NAND Buffer

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the
user.

2. A critical component in any com ponen t of a life supp ort
device or system whose failu re to perform can be rea­sonably expected to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A