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© 1999 Fairchild Semiconductor Corporation DS009525 www.fairchildsemi.com
April 1988
Revised August 1999
74F377 Octal D-Type Flip-Flop with Clock Enable
74F377
Octal D-Type Flip-Flop with Clock Enable
General Description
The 74F377 has eight edge-triggered, D-type flip-flops with
individual D inputs and Q outp uts. The common buffered
Clock (CP) input loads all flip-flops simultaneously, when
the Clock Enable (CE
) is LOW .
The register is fully edge-t riggered. The state of each D
input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output.
The CE
input must be stable only on e setup time prior to
the LOW-to-HIGH clock transition for predictable operation.
Features
■ Ideal for addressable register applications
■ Clock enable for address and data synchronization
applications
■ Eight edge-triggered D-type flip-flops
■ Buffered common clock
■ See 74F273 for master reset version
■ See 74F373 for transparent latch version
■ See 74F374 for 3-STATE version
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” tot he ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F377SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F377SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F377PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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74F377
Unit Loading/Fan Out
Mode Select-Function Table
H = HIGH Voltage Level
h = HIGH Voltage Level one setup tim e prior to the LOW-to-HIGH C lock Transition
L = LOW Voltage Level
I = LOW Voltage Level one se tu p t im e prior to the LOW-to-HIGH C lock Transition
X = Immaterial
= LOW-to-HIGH Clock Transition
Logic Diagram
Please note that this diagram is provided o nly f or t he understanding of lo gic operations and should not be used to estimate propagation delays.
Pin Names Description
U.L.
Input I
IH/IIL
HIGH/LOW
Output I
OH/IOL
D0–D
7
Data Inputs 1.0/1.0 20 µA/−0.6 mA
CE
Clock Enable (Active LOW) 1.0/1.0 20 µA/−0.6 mA
CP Clock Pulse Input 1.0/1.0 20 µA/−0.6 mA
Q
0–Q7
Data Outputs 50/33.3 −1 mA/20 mA
Operating Mode
Inputs Output
CP CE
D
n
Q
n
Load “1”
IhH
Load “0”
IIL
Hold
h X No Change
(Do Nothin g) X H X No Change
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74F377
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyon d which the device
may be damaged or have its useful life impaired . Functional operation
under these condit ions is not implied.
Note 2: Either voltage limit or curren t limit is sufficient to protect in puts.
DC Electrical Characteristics
Storage Temperature −65°C to +150°C
Ambient Temperature under Bias −55°C to +125°C
Junction Temperature under Bias −55°C to +150°C
V
CC
Pin Potential to Ground Pin −0.5 V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
= 0V)
Standard Output −0.5V to V
CC
3-STATE Output −0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
ESD Last Passing Voltage (Min) 4000V
Free Air Ambi ent Temperature 0°C to +70°C
Supply Voltage +4.5V to +5.5V
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA
V
OH
Output HIGH 10% V
CC
2.5
VMin
IOH = −1 mA
Voltage 5% V
CC
2.7 IOH = −1 mA
V
OL
Output LOW 10% V
CC
0.5 V Min IOL = 20 mA
Voltage
I
IH
Input HIGH Current 5.0 µAMaxVIN = 2.7V
I
BVI
Input HIGH Current
7.0 µAMaxVIN = 7.0V
Breakdown Test
I
IL
Input LOW Current −0.6 mA Max VIN = 0.5V
I
OS
Output Short-Circuit Current −60 −150 mA Max V
OUT
= 0V
I
CEX
Output HIGH Leakage Current 50 µAMaxV
OUT
= V
CC
V
ID
Input Leakage
4.75 V 0.0
IID = 1.9 µA
Test All Other Pins Grounded
I
OD
Output Leakage
3.75 µA0.0
V
IOD
= 150 mV
Circuit Current All Other Pins Grounded
I
CCH
Power Supply Current 35 46
mA Max
CP =
I
CCL
44 56
Dn = MR = HIGH
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74F377
AC Electrical Characteristics
AC Operating Requirements
Symbol Parameter
TA = +25°CT
A
= −55°C to +125°CTA = 0°C to +70°C
Units
VCC = +5.0V VCC = +5.0V VCC = +5.0V
CL = 50 pF CL = 50 pF CL = 50 pF
Min Typ Max Min Max Min Max
f
MAX
Maximum Clock Frequency 130 85 105 MHz
t
PLH
Propagation Delay 3.0 7.0 2.0 8.5 2.5 7.5
ns
t
PHL
CP to Q
n
4.0 9.0 3.0 10.5 3.5 9.0
Symbol Parameter
TA = +25°CTA = −55°C to +125°CTA = 0°C to +70°C
UnitsVCC = +5.0V VCC = +5.0V VCC = +5.0V
Min Max Min Max Min Max
tS(H) Setup Time, HIGH or LOW 3.0 3.5 3.0
ns
tS(L) Dn to CP 3.5 4.0 3.5
tH(H) Hold Time, HIGH or LOW 0.5 1.0 0.5
ns
tH(L) Dn to CP 1.0 1.0 1.0
tS(H) Setup Time, HIGH or LOW 4.1 4.0 4.1
ns
tS(L)
CE to CP
3.5 5.0 4.0
tH(H) Hold Time, HIGH to LOW 0.5 1.5 0.5
ns
tH(L)
CE to CP
2.0 2.5 2.0
tW(H) Clock Pulse Width, 6.0 5.0 6.0
ns
tW(L) HIGH or LOW 6.0 5.0 6.0
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74F377
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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74F377 Octal D-Type Flip-Flop with Clock Enable
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit pate nt licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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SEMICONDUCTOR CORPORATION. As used herein:
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which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant inju ry to the
user.
2. A critical component i n any compon ent of a lif e support
device or system whose failu re to perform can be reasonably expected to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.
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