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June 1988
Revised September 2000
74F219
64-Bit Random Access Memory with 3-STATE Outputs
74F219 64-Bit Random Access Memory with 3-STATE Outputs
General Description
The 74F219 is a high-speed 64-bit RAM organized as a 16word by 4-bit array. Address inputs are buffered to minimize loading and are fu lly decoded on-chip. The outputs
are 3-STATE and are i n the high-impedance sta te whenever the Chip Sele ct (CS
active only in the Read mode. This device is sim ilar to the
74F189 but features non-inverting, rather than inverting,
data outputs.
) input is HIGH. The outputs are
Features
■ 3-STATE outputs for data bus applications
■ Buffered inputs minimize loading
■ Address decoding on-chip
■ Diode clamped inputs minimize ringing
■ Available in SOIC (300 mil only)
Ordering Code:
Order Number Package Number Package Description
74F219SC M16B 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F219SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F219PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also availab le in Tape and Reel. Specify by appending the suffix letter “X” to the o rdering code.
Logic Symbol Connection Diagram
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Unit Loading/Fan Out
74F219
Pin Names Description
A0–A
3
CS
WE
D
0–D3
O
0–O3
Function Table
CS
L L Write High Impedance
L H Read True Stored Data
H X Inhibit High Impedance
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Block Diagram
U.L.
HIGH/LOW
Address Inputs 1.0/1.0 20 µA/−0.6 mA
Chip Select Input (Active LOW) 1.0/2.0 20 µA/−1.2 mA
Write Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA
Data Inputs 1.0/1.0 20 µA/−0.6 mA
3-STATE Data Outputs 150/40 (33.3) −3 mA/24 mA (20 mA)
Inputs
WE
Operation Condition of Outputs
Input I
Output I
IH/IIL
OH/IOL
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Absolute Maximum Ratings(Note 1) Recommended Operating
Storage Temperature −65°C to +150°C
Ambient Temperature under Bias
Junction Temperature under Bias
Pin Potential to Ground Pin −0.5V to +7.0V
V
CC
Input Voltage (Note 2)
Input Current (Note 2)
−55°C to +125°C
−55°C to +150°C
−0.5V to +7.0V
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
Standard Output
CC
= 0V)
−0.5V to V
3-STATE Output −0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twice the rated I
OL
Conditions
Free Air Ambient Temperature 0
Supply Voltage
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired . Functional operation
CC
under these conditions is not implied.
Note 2: Either voltage lim it or c urrent limit is sufficient to protect inputs.
(mA)
DC Electrical Characteristics
Symbol Parameter
V
V
V
V
V
I
IH
I
BVI
I
CEX
V
I
OD
I
IL
I
OZH
I
OZL
I
OS
I
ZZ
I
CC
IH
IL
CD
OH
OL
ID
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
Input LOW Voltage 0.8 V Recognized as a LOW Signal
Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA
Output HIGH 10% V
Voltage 10% V
Output LOW 10% V
Voltage
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test All Other Pins Grounded
Output Leakage
Circuit Current All Other Pins Grounded
Input LOW −0.6
Current −1.2 VIN = 0.5V (CS)
Output Leakage Current 50 µAMaxV
Output Leakage Current −50 µAMaxV
Output Short-Circuit Current −60 −150 mA Max V
Bus Drainage Test 500 µA0.0VV
Power Supply Current 37 55 mA Max
5% V
5% V
Min
Typ Max
2.5
CC
2.4 IOH = −3 mA
CC
2.7 IOH = −1 mA
CC
2.7 IOH = −3 mA
CC
CC
4.75 V 0.0
3.75 µA0.0
Units
0.5 V Min IOL = 24 mA
5.0 µAMaxVIN = 2.7V
7.0 µAMaxVIN = 7.0V
50 µAMaxV
mA Max
V
CC
IOH = −1 mA
VMin
IID = 1.9 µA
V
VIN = 0.5V (An, WE, Dn)
OUT
IOD
OUT
OUT
OUT
OUT
+4.5V to +5.5V
Conditions
= V
CC
= 150 mV
= 2.7V
= 0.5V
= 0V
= 5.25V
74F219
°C to +70°C
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AC Electrical Characteristics
74F219
Symbol Parameter
t
t
t
t
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
PZH
PZL
PHZ
PLZ
Access Time, HIGH or LOW 10.0 18.5 26.0 9.0 32.0 10.0 27.0
An to O
n
Access Time, HIGH or LOW 3.5 6.0 8.5 3.5 10.5 3.5 9.5
CS to O
n
Disable Time, HIGH or LOW 2.0 4.0 6.0 2.0 8.0 2.0 7.0
CS to O
n
Write Recovery Time 6.5 20.0 28.0 6.5 37.5 6.5 29.0
HIGH or LOW, WE to O
Disable Time, HIGH or LOW 4.0 7.0 10.0 3.5 12.0 4.0 11.0
WE to O
n
= +25°CT
T
A
V
= +5.0V VCC = +5.0V VCC = +5.0V
CC
= 50 pF CL = 50 pF CL = 50 pF
C
L
Min Typ Max Min Max Min Max
8.0 13.5 19.0 8.0 23.0 8.0 20.0
5.0 9.0 13.0 5.0 15.0 5.0 14.0
3.0 5.5 8.0 2.5 10.0 3.0 9.0
n
6.5 11.0 15.5 6.5 17.5 6.5 16.5
5.0 9.0 13.0 5.0 15.0 5.0 14.0
= −55°C to +125°CTA = 0°C to +70°C
A
AC Operating Requirements
TA = +25°CTA = −55°C to +125°CTA = 0°C to +70°C
Symbol Parameter
tS(H) Setup Time, HIGH or LOW 0 0 0
t
(L) An to WE 000
S
(H) Hold Time, HIGH or LOW 2.0 2.0 2.0
t
H
tH(L) An to WE 2.0 2.0 2.0
t
(H) Setup Time, HIGH or LOW 10.0 11.0 10.0
S
(L) Dn to WE 10.0 11.0 10.0
t
S
tH(H) Hold Time, HIGH or LOW 0 2.0 0
t
(L) Dn to WE 02.00
H
(L) Setup Time, LOW
t
S
CS to WE
tH(L) Hold Time, LOW
to WE
CS
tW(L) WE Pulse Width, LOW 6.0 15.0 6.0 ns
Min Max Min Max Min Max
000
6.0 7.5 6.0
Units
ns
ns
ns
UnitsVCC = +5.0V VCC = +5.0V VCC = +5.0V
ns
ns
ns
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Physical Dimensions inches (millimeters) unless otherwise noted
74F219
16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M16B
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
74F219
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
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Package Number M16D
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
74F219 64-Bit Random Access Memory with 3-STATE Outputs
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Fairchild does not assume any responsibility for use of any circuitry described , no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are dev ic es or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provide d in the l abe ling, can be reasonably expected to result in a significant injury to the
user.
Package Number N16E
2. A critical compo nent in any com ponen t of a life s upp ort
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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