Datasheet 74F132SJX, 74F132SJ, 74F132SCX, 74F132SC, 74F132PC Datasheet (Fairchild Semiconductor)

© 1999 Fairchild Semiconductor Corporation DS009477 www.fairchildsemi.com

April 1988
Revised July 1999

74F132 Quad 2-Input NAND Schmitt Trigger

74F132
Quad 2-Input NAND Schmitt Trigger

General Description

The F132 contains four 2-input NAND gates which accept
standard TTL input signal s and provide standard TTL ou t­put levels. They are capa ble o f transf orming slowly ch ang­ing input signals into sharply defined, jitter-free output
signals. In addition, they have a gre ater noise mar gin than
conventional NAND gates.

Each circuit contains a 2 -input Sch mitt Trigger follo wed by
level shifting circuitry and a standa rd FAST output struc-

ture. The Schmitt Trigger uses positive feedback to effec­tively speed-up slow inp ut t ran siti on s, an d p rov ide d ifferen t
input threshold voltages for positive and negative-going
transitions. This hysteresis between th e pos i tive- goin g and
negative-going input threshold (ty pically 800 mV) is deter­mined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations.

Ordering Code:

Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.

Logic Symbol

IEEE/IEC

Unit Loading/Fan Out

Connection Diagram

Function Table

H = HIGH Voltage Level
L = LOW Voltage Level

FAST is a regist ered trademark of Fairc hild Semiconductor C orporation

Order Number Package Number Package Description

74F132SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F132SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F132PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Pin Names Description

U.L. Input I

IH/IIL

HIGH/LOW Output IOH/I

OL

An, B

n

Inputs 1.0/1.0 20 µA/−0.6 mA

O

n

Outputs 50/33.3 −1 mA/20 mA

Inputs Outputs

AB O

LL H
LH H
HL H
HH L

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74F132

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions

Note 1: Absolute maximum ratings are values beyond which the device

may be damaged or have its useful life impaired. Functional operation
under these conditi ons is not implied.

Note 2: Either voltage limit or curren t limit is sufficient to protect in put s .

DC Electrical Characteristics

AC Electrical Characteristics

Storage Temperature −65°C to +150°C
Ambient Temperature under Bias −55°C to +125°C
Junction Temperature under Bias −55°C to +150°C
V

CC

Pin Potential to Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Output

in HIGH State (with V

CC

= 0V)

Standard Output −0.5V to V

CC

3-STATE Output −0.5V to +5.5V

Current Applied to Output

in LOW State (Max) twice the rated I

OL

(mA)

ESD Last Passing Voltage (Min) 4000V

Free Air Ambient Temperature 0°C to +70°C
Supply Voltage +4.5V to +5.5V

Symbol Parameter Min Typ Max Units

V

CC

Conditions

V

T+

Positive-going Threshold 1.5 2.0 V 5.0

V

T−

Negative-going Threshold 0.7 1.1 V 5.0

∆V

T

Hysteresis (V

T

+

− V

T

−

)0.4 V5.0

V

CD

Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA

V

OH

Output HIGH 10% V

CC

2.5 V Min IOH = −1 mA

Voltage 5% V

CC

2.7 IOH = −1 mA

V

OL

Output LOW Voltage 10% V

CC

0.5 V Min IOL = 20 mA

I

IH

Input HIGH Current 5.0 µAMaxVIN = 2.7V

I

BVI

Input HIGH Current Breakdown Test 7.0 µAMaxVIN = 7.0V

I

CEX

Output HIGH Leakage Current 50 µAMaxV

OUT

= V

CC

V

ID

Input Leakage Test

4.75 V 0.0

IID = 1.9 µA
All Other Pins Grounded

I

OD

Output Leakage Circuit Current

3.75 µA0.0

V

IOD

= 150 mV

All Other Pins Grounded

I

IL

Input LOW Current −0.6 mA Max VIN = 0.5V

I

OS

Output Short-Circuit Current −60 −150 mA Max V

OUT

= 0V

I

CCH

Power Supply Current 17.0 mA Max VO = HIGH

I

CCL

Power Supply Current 18.0 mA Max VO = LOW

Symbol Parameter

TA = +25°CT

A

= 0°C to +70°C

Units

VCC = +5.0V VCC = +5.0V

CL = 50 pF CL = 50 pF

Min Typ Max Min Max

t

PLH

Propagation Delay 4.0 10.5 3.5 12.0

ns

t

PHL

An, Bn to O

n

5.0 12.5 5.0 13.0

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74F132

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

Package Number M14A

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M14D

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74F132 Quad 2-Input NAND Schmitt Trigger

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Package Number N14A

Fairchild does not assume any responsibility for use of any circuitry described, no circuit pate nt licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea­sonably expected to result in a significant inju ry to the
user.

2. A critical component in any com ponen t of a life supp ort
device or system whose failu re to perform can be rea­sonably expected to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.

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