Datasheet 74AVC16836 Datasheet (Philips)

INTEGRATED CIRCUITS

74AVC16836

20-bit registered driver with inverted register enable (3-State)

Preliminary specification

Replaces datasheet 74AVC16836/74AVCH16836 dated 1998 Dec 07

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1999 Jul 23

Philips Semiconductors Preliminary specification

1

CPDPower dissi ation ca acitance er buffer

V

GND to V

1

F

20-bit registered driver with inverted register enable (3-State)

FEATURES

•Wide supply voltage range of 1.2 V to 3.6 V

•Complies with JEDEC standard no. 8-1A/5/7.

•CMOS low power consumption

•Input/output tolerant up to 3.6 V

•DCO (Dynamic Controlled Output) circuit dynamically changes

output impedance, resulting in noise reduction without speed degradation

•Low inductance multiple V

and GND pins for minimum noise

CC

and ground bounce

•Power off disables 74AVC16836 outputs, permitting Live Insertion

DESCRIPTION

The 74AVC16836 is a 20-bit universal bus driver. Data flow is controlled by output enable (OE (CP).

This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance state during power up or power down, OE

should be tied to VCC through a pullup resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient. See the graphs on page 8 for typical curves.

), latch enable (LE) and clock inputs

PIN CONFIGURATION

1 2

Y

0

3

Y

1

4

GND

5

Y

2

6

Y

3

7

V

CC

8

Y

4

9

Y

5

Y

10

6

GND

11

Y

12

7

Y

13

8

14

Y

9

15

Y

10

16

Y

11

17

Y

12

18

GND

19

Y

13

20

Y

14

21

Y

15

22

V

CC

23

Y

16

24

Y

17

25

GND

26

Y

18

27

Y

19

28 29

NC

74A VC16836

CP

56OE

A

55

0

54

A

1

53

GND

52

A

2

51

A

3

50

V

CC

49

A

4

48

A

5

A

47

6

GND

46

A

45

7

A

44

8

43

A

9

42

A

10

41

A

11

40

A

12

39

GND

38

A

13

37

A

14

36

A

15

35

V

CC

34

A

16

33

A

17

32

GND

31

A

18

30

A

19

LE

QUICK REFERENCE DA TA

GND = 0 V; T

SYMBOL

t

PHL/tPLH

t

PHL/tPLH

C

I

NOTES:

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD

= CPD × V

P

D

= output frequency in MHz; VCC = supply voltage in V; S (CL × V

f

o

= 25°C; tr = tf ≤ 2.0 ns; CL = 30 pF.

amb

Propagation delay An to Yn

Propagation delay LE to Yn; CP to Yn

Input capacitance 5.0 pF

2

× fi + S (CL × V

CC

ORDERING INFORMATION

56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II –40°C to +85°C 74AVC16836 DGG SOT364-1

1999 Jul 23

SH00159

PARAMETER CONDITIONS TYPICAL UNIT

p

CC

p

2

PACKAGES

VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V

p

× fo) where: fi = input frequency in MHz; CL = output load capacitance in pF;

=

I

CC

2

× fo) = sum of outputs.

TEMPERATURE

RANGE

Outputs enabled 25

Output disabled 6

ORDER CODE

2.6

2.0

1.7

3.0

2.4

2.0

2

ns

p

DRAWING

NUMBER

Philips Semiconductors Preliminary specification

OUTPUTS

20-bit registered driver with inverted register enable (3-State)

PIN DESCRIPTION

PIN NUMBER SYMBOL NAME AND FUNCTION

28 NC No connection

2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 15, 16, 17, 19,

Y0 to Y19Data outputs

20, 21, 23, 24, 26, 27

4, 11, 18, 25, 32, 35, 39,

46, 53

7, 22, 35, 50 V

1 OE

29 LE

GND Ground (0V)

Positive supply voltage

CC

Output enable input (active LOW)

Latch enable input (active LOW)

56 CP Clock input

55, 54, 52, 51, 49, 48, 47, 45, 44, 43, 42, 41, 40, 38, 37, 36, 34, 33,

A0 to A19Data inputs

31, 30

LOGIC SYMBOL

OE

CP

LE

LOGIC SYMBOL (IEEE/IEC)

OE

CP

LE

Y Y Y Y Y Y Y Y Y

Y

10

Y

11

Y

12

Y

13

Y

14

Y

15

Y

16

Y

17

Y

18

Y

19

74A VC16836

1 56 29

2

0

3

1

5

2

6

3

8

4

9

5

10

6

12

7

13

8

14

9

15 16 17 19 20 21 23 24

26 27

EN1

2C3 C3 G2

1 ∇ 1

55

A

0

54

A

1

52

A

2

3D

51

A

3

49

A

4

48

A

5

47

A

6

45

A

7

44

A

8

43

A

9

42

A

10

41

A

11

40

A

12

38

A

13

37

A

14

36

A

15

34

A

16

33

A

17

31

A

18

30

A

19

A

0

D

Y

LE

CP

0

FUNCTION TABLE

INPUTS

SH00160

OE LE CP A

H X X X Z

TO THE 19 OTHER CHANNELS

L L X L L L L X H H

SH00163

L H ↑ L L L H ↑ H H L H H X Y L H L X Y

1

0

2

0

H = HIGH voltage level L = LOW voltage level X = Don’t care Z = High impedance “off” state ↑ = LOW-to-HIGH level transition

NOTES:

1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low.

2. Output level before the indicated steady-state input conditions were established.

1999 Jul 23

3

Philips Semiconductors Preliminary specification

CC

20-bit registered driver with inverted register enable (3-State)

168-pin SDR SDRAM DIMM

SDRAM

BACK SIDE

FRONT SIDE

SDRAM

AVC16836

SDRAM

AVC16836 PCK2509S or PCK2510SAVC16836

The PLL clock distribution device and AVC registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation

SDRAM

74A VC16836

SDRAM

SW00409

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN MAX UNIT

DC supply voltage

V

(according to JEDEC Low Voltage Standards)

DC supply voltage (for low voltage applications)

V

DC Input voltage range 0 3.6 V

I

1.65

2.3

3.0

1.2 3.6

DC output voltage range; output 3-State 0 3.6

V

O

T

amb

tr, t

DC output voltage range; output HIGH or LOW state

0 V

Operating free-air temperature range –40 +85 °C

Input rise and fall times

f

VCC = 1.65 to 2.3 V

VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V

0 0 0

1.95

2.7

3.6

CC

30 20 10

V

ns/V

1999 Jul 23

4

Philips Semiconductors Preliminary specification

VIHHIGH level In ut voltage

V

VILLOW level In ut voltage

V

CC I IH IL

V

0.20

V

CC I IH IL

GND

0.20

V

CC

µ

I

g

V

GND

µ

IOZ3-State out ut OFF-state current

µA

ICCQuiescent su ly current

µA

20-bit registered driver with inverted register enable

74A VC16836

(3-State)

ABSOLUTE MAXIMUM RATINGS

In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0 V)

SYMBOL

I

GND

V

CC

I

IK

V

I

OK

V

O

V

O

I

O

, I

T

stg

P

TOT

DC supply voltage –0.5 to +4.6 V DC input diode current VI t0 –50 mA DC input voltage For all inputs DC output diode current V DC output voltage; output 3-State Note 1 –0.5 to 4.6 V DC output voltage;

output HIGH or LOW state DC output source or sink current VO = 0 to V DC VCC or GND current "100 mA

CC

Storage temperature range –65 to +150 °C Power dissipation per package

–plastic thin-medium-shrink (TSSOP)

NOTE:

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions. V oltage are referenced to GND (ground = 0 V).

SYMBOL PARAMETER TEST CONDITIONS T emp = -40°C to +85°C UNIT

V

I

OFF

I

IHZ/IILZ

NOTES:

1. All typical values are at T

HIGH level output voltage

OH

LOW level output voltage

OL

I

Input leakage current

I

3-State output OFF-state current VCC = 0 V; VI or VO = 3.6 V – 0.1 "10 µA 3-State output OFF-state current VCC = 1.65 to 3.6 V; VI = VCC or GND – 0.1 12.5 µA

PARAMETER CONDITIONS RATING UNIT

1

uVCC or VO t 0 "50 mA

O

–0.5 to 4.6 V

Note 1 –0.5 to VCC +0.5 V

CC

"50 mA

For temperature range: –40 to +125 °C above +55°C derate linearly with 8 mW/K 600

LIMITS

MIN TYP

VCC = 1.2 V V

p

VCC = 1.65 to 1.95 V 0.65V VCC = 2.3 to 2.7 V 1.7 1.2 –

CC

1

MAX

– –

0.9 –

VCC = 3.0 to 3.6 V 2.0 1.5 – VCC = 1.2 V – – GND

p

VCC = 1.65 to 1.95 V – 0.9 0.35V VCC = 2.3 to 2.7 V – 1.2 0.7 VCC = 3.0 to 3.6 V – 1.5 0.8 VCC = 1.65 to 3.6 V; VI = VIH or VIL;

IO = –100 µA VCC = 1.65 V; VI = VIH or VIL; IO = –4 mA V VCC = 2.3 V; VI = VIH or VIL; IO = –8 mA V VCC = 3.0 V; VI = VIH or VIL; IO = –12 mA V VCC = 1.65 to 3.6 V; VI = VIH or VIL;

IO = 100 µA

CC

CC CC CC

*

0.45 V

*

0.55 V

*

0.70 V

*

–

CC

0.10 –

*

CC

0.28 –

*

CC

0.32 –

*

CC

VCC = 1.65 V; VI = VIH or VIL; IO = 4 mA – 0.10 0.45 VCC = 2.3 V; VI = VIH or VIL; IO = 8 mA – 0.26 0.55 VCC = 3.0 V; VI = VIH or VIL; IO = 12 mA – 0.36 0.70

= 1.65 to 3.6 V

=

or

I

CC

VCC = 1.65 to 2.7 V; VI = VIH or VIL;

p

VO = VCC or GND VCC = 3.0 to 3.6 V; VI = VIH or VIL;

VO = VCC or GND

pp

amb

= 25°C.

VCC = 1.65 to 2.7 V; VI = VCC or GND; IO = 0 – 0.1 20 VCC = 3.0 to 3.6 V; VI = VCC or GND; IO = 0 – 0.2 40

;

– 0.1 2.5

– 0.1 5

– 0.1 10

mW

CC

–

V

A

1999 Jul 23

5

Philips Semiconductors Preliminary specification

W

t

ns

t

ns

20-bit registered driver with inverted register enable

74A VC16836

(3-State)

AC CHARACTERISTICS

GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF

LIMITS

SYMBOL PARAMETER WAVEFORM VCC = 3.3 ± 0.3 V VCC = 2.5 ± 0.2 V VCC = 1.8 ± 0.15 V VCC = 1.2 V UNIT

MIN TYP1MAX MIN TYP1MAX MIN TYP1MAX TYP

Propagation delay An to Yn

t

PHL/tPLH

Propagation delay LE to Yn

Propagation delay CP to Yn

t

PZH/tPZL

t

PHZ/tPLZ

3-State output enable time OE to Yn

3-State output disable time OE to Yn

CP pulse width HIGH

t

W

or LOW LE pulse width HIGH 2, 7 1.0 – – 1.2 – – 2.0 – – – Set-up time An to CP 5, 7 0.3 – – 0.4 – – 0.5 – – –

SU

Set-up time An to LE 4, 7 0.3 – – 0.4 – – 0.5 – – – Hold time An to CP 5, 7 0.3 – – 0.4 – – 0.5 – –

F

h

max

Hold time An to LE 4, 7 0.3 – – 0.4 – – 0.5 – – Maximum clock pulse

frequency

NOTES:

1. All typical values are measured at T

1, 7 0.7 1.7 2.5 0.8 2.0 3.0 1.0 2.6 4.5 5.2

2, 7 0.7 2.0 3.0 0.8 2.4 3.6 1.0 3.0 5.5 6.0

3, 7 0.7 1.9 2.9 0.8 2.2 3.3 0.9 2.8 5.2 5.5

6, 7 1.0 2.5 4.5 1.0 2.8 5.0 1.5 3.5 6.5 6.0 ns

6, 7 1.0 2.5 4.0 1.0 2.4 4.5 1.5 4.0 6.5 6.0 ns

3, 7 1.0 – – 1.2 – – 2.0 – – –

3, 7 500 – – 400 – – 250 – – MHz

= 25°C and at VCC = 1.8 V, 2.5 V, 3.3 V.

amb

ns

AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V RANGE

VM = 0.5 V VX = VOL + 0.300 V VY = VOH – 0.300 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = V

CC

AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE

VM = 0.5 V VX = VOL + 0.15 V VY = VOH – 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. V

= V

I

CC

V

I

A

n

INPUT

GND

V

OH

Y

n

OUTPUT V

OL

V

M

t

PHL

NOTE: VM = 0.5VCC at V

V

M

= 2.3 to 2.7 V

CC

t

PLH

SH00132

Waveform 1. Input (An) to output (Yn) propagation delay

V

I

LE INPUT

GND

V

Yn OUTPUT

V

M

t

PHL

OH

OL

NOTE: VM = 0.5 VCC at V

t

W

V

M

= 2.3 to 2.7 V

CC

V

t

PLH

M

SH00165

Waveform 2. Latch enable input (LE) pulse width, the latch

enable input to output (Yn) propagation delays.

1999 Jul 23

6

Philips Semiconductors Preliminary specification

ÉÉÉÉ

20-bit registered driver with inverted register enable (3-State)

AC WAVEFORMS FOR VCC = 3.0 V TO 3.6 V RANGE (Continued)

VM = 0.5 V VX = VOL + 0.300 V VY = VOH – 0.300 V VOL and VOH are the typical output voltage drop that occur with the output load. V

= V

I

AC WAVEFORMS FOR VCC = 2.3 V TO 2.7 V AND V

CC

VM = 0.5 V VX = VOL + 0.15 V VY = VOH – 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. V

= V

I

Waveform 4. Data set-up and hold times for the An input to the

CC

< 2.3V RANGE (Continued)

CC

1/f

V

M

t

W

t

PHL

th

V

M

= 2.3 to 2.7 V

LE

MAX

V

M

CC

input

V

t

PLH

= 2.3 to 2.7 V

M

SH00135

th

t

SU

SH00166

V

I

CP INPUT

GND

V

OH

Yn OUTPUT

V

OL

NOTE: VM = 0.5VCC at V

Waveform 3. The clock (CP) to Yn propagation delays, the

clock pulse width and the maximum clock frequency.

V

I

An INPUT

GND

V

I

LE INPUT

GND

NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.

V

M

t

SU

VM = 0.5VCC at V

CC

CP INPUT

GND

An INPUT

GND

Yn OUTPUT

NOTE: The shaded areas indicate when the input is permitted to change

Waveform 5. Data set-up and hold times for the An input to the

V

I

nOE INPUT

GND

V

CC

OUTPUT LOW-to-OFF OFF-to-LOW

V

OL

V

OH

OUTPUT HIGH-to-OFF OFF-to-HIGH

GND

NOTE: VM = 0.5VCC at V

Waveform 6. 3-State enable and disable times

V

I

V

M

t

su

V

I

V

OH

V

OL

for predictable output performance.

VM = 0.5VCC at V

= 2.3 to 2.7 V

CC

clock CP input

V

M

t

PLZ

V

t

PHZ

outputs enabled

= 2.3 to 2.7 V

CC

74A VC16836

t

h

V

M

X

V

Y

outputs disabled

t

su

t

h

SH00136

t

PZL

V

M

t

PZH

V

M

outputs enabled

SH00137

1999 Jul 23

7

Philips Semiconductors Preliminary specification

20-bit registered driver with inverted register enable (3-State)

TEST CIRCUIT

PULSE GENERATOR

DEFINITIONS

RL = Load resistor C

= Load capacitance includes jig and probe capacitance

L

R

= Termination resistance should be equal to Z

T

SWITCH POSITION

TEST S

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

Waveform 7. Load circuitry for switching times

V

CC

V

I

D.U.T.

R

T

V

O

C

L

Test Circuit for switching times

of pulse generators.

OUT

Open

2  V

GND

V

1

CC

< 2.3 V V

2.3–2.7 V

3.0 V 500 Ω

V

I

CC

V

CC

V

CC

S

1

R

L

R

L

R

1000 Ω

500 Ω

2 * V Open

GND

L

SV01018

CC

GRAPHS

–50

–100

–150

–200

–250

(mA) OUTPUT CURRENT

OH

I

–300

–350

–300

–250

–200

–150

–100

(mA) OUTPUT CURRENT

OH

–50

I

74A VC16836

0

1.8V

2.5V

3.3V

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

0

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

VOH (V) OUTPUT VOLTAGE

2.5V

1.8V

VOH (V) OUTPUT VOLTAGE

PMOS

SH00161

NMOS

SH00162

3.3V

1999 Jul 23

8

Philips Semiconductors Preliminary specification

20-bit registered driver with inverted register enable (3-State)

TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm SOT364-1

74A VC16836

1999 Jul 23

9

Philips Semiconductors Preliminary specification

20-bit registered driver with inverted register enable (3-State)

Data sheet status

Objective specification

Preliminary specification

Product specification

Product status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

[1]

74A VC16836

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381

 Copyright Philips Electronics North America Corporation 1998

print code Date of release: 07-99 Document order number: 9397-750-06252

 

1999 Jul 23

10