changes output impedance,resulting in noise reduction
without speed degradation
• Low inductance multiple power and ground pins for
minimum noise and ground bounce
• Power off disables outputs, permitting live insertion.
DESCRIPTION
The 74AVC16245 is a 16-bit transceiver featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions.
The74AVC16245features two output enableinputs(nOE)
for easy cascading and two send/receive inputs (nDIR) for
directioncontrol.Input nOE controls theoutputssothatthe
buses are effectively isolated. This device can be used as
two 8-bit transceivers or one 16-bit transceiver.
This product is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, input nOE should be tied to V
through a pull-up resistor (live insertion).
A DCO circuitry is implemented to support termination line
drive during transient (see Figs 1 and 2).
74AVC16245
CC
3
VOH (V)
MNA506
handbook, halfpage
0
I
OH
(mA)
−100
−200
−300
0124
1.8 V
2.5 V
3.3 V
Fig.1 Output current as function of output voltage.
3
MNA507
VOL (V)
300
handbook, halfpage
I
OL
(mA)
200
100
0
0124
3.3 V
2.5 V
1.8 V
Fig.2 Output current as function of output voltage.
1999 Nov 152
Page 3
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
74AVC16245
(3.6 V tolerant)
QUICK REFERENCE DATA
GND = 0 V; T
SYMBOLPARAMETERCONDITIONSTYP.UNIT
t
PHL/tPLH
C
I
C
PD
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC= supply voltage in Volts;
∑ (CL× V
2. The condition is VI= GND to VCC.
=25°C; tr=tf≤2.0 ns; CL=30pF.
amb
propagation delay nAnto nBn;
nBnto nA
n
VCC= 1.2 V2.8ns
V
= 1.5 V1.8ns
CC
V
= 1.8 V1.8ns
CC
= 2.5 V1.3ns
V
CC
V
= 3.3 V1.1ns
CC
input capacitance5.0pF
power dissipation capacitance per buffer notes 1 and 2
outputs enabled42pF
outputs disabled2pF
2
× fi+ ∑ (CL× V
CC
2
× fo) = sum of outputs.
CC
2
× fo) where:
CC
FUNCTION TABLE
See note 1.
INPUTSINPUTS/OUTPUTS
n
OEnDIRnA
LLA = Binputs
LHinputsB = A
HXZZ
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
n
nB
n
1999 Nov 153
Page 4
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
74AVC16245
(3.6 V tolerant)
ORDERING INFORMATION
TYPE NUMBER
TEMPERATURE RANGEPINSPACKAGEMATERIALCODE
74AVC16245DGG−40 to +85 °C48TSSOPplasticSOT362-1
PINNING
PINSYMBOLDESCRIPTION
11DIRdirection control
2, 3, 5, 6, 8, 9, 11 and 121B
to 1B
0
4, 10, 15, 21, 28, 34, 39 and 45GNDground (0 V)
7, 18, 31 and 42V
13, 14, 16, 17, 19, 20, 22 and 232B
CC
to 2B
0
242DIRdirection control
252
26, 27, 29, 30, 32, 33, 35 and 362A
37, 38, 40, 41, 43, 44, 46 and 471A
481
OEoutput enable input (active LOW)
to 2A
7
to 1A
7
OEoutput enable input (active LOW)
PACKAGE
7
7
0
0
data inputs/outputs
DC supply voltage
data inputs/outputs
data inputs/outputs
data inputs/outputs
1999 Nov 154
Page 5
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
handbook, halfpage
1DIR
1B
1B
GND
1B
1B
V
CC
1B
1B
GND
1B
1B
2B
2B
GND
2B
2B
V
CC
2B
2B
GND
2B
2B
2DIR
1
2
0
3
1
4
5
2
6
3
7
8
4
9
5
10
11
6
12
7
0
1
2
3
4
5
6
7
16245
13
14
15
16
17
18
19
20
21
22
23
24
MNA508
1OE
48
1A
47
0
1A
46
1
GND
45
1A
44
2
1A
43
3
V
42
CC
1A
41
4
1A
40
5
GND
39
1A
38
6
1A
37
7
2A
36
0
2A
35
1
GND
34
2A
33
2
2A
32
3
V
31
CC
2A
30
4
2A
29
5
GND
28
2A
27
6
26
2A
7
25
2OE
1OE
1DIR
2OE
2DIR
1A
1A
1A
1A
1A
1A
1A6
1A
2A
2A
2A
2A
2A
2A
2A
2A
74AVC16245
48
G3
1
3EN1[BA]
3EN2[AB]
25
G6
24
6EN1[BA]
6EN2[AB]
47
0
46
1
44
2
43
3
41
4
40
5
38
37
7
36
0
35
1
33
2
32
3
30
4
29
5
27
6
26
7
1
2
4
5
2
1B
3
1B
5
1B
6
1B
8
1B
9
1B
11
1B
12
1B
13
2B
14
2B
16
2B
17
2B
19
2B
20
2B
22
2B
23
2B
MNA003
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Fig.3 Pin configuration.
1999 Nov 155
Fig.4 IEEE/IEC logic symbol.
Page 6
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
handbook, full pagewidth
1DIR
1
1OE
1A
0
47
1A
1
46
1A
2
44
1A
3
43
1A
4
41
1A
5
40
1A
6
38
1A
7
37
48
1B
0
2
1B
1
3
1B
2
5
1B
3
6
1B
4
8
1B
5
9
1B
6
11
1B
7
12
74AVC16245
2DIR
24
2OE
2B
2B
2B
2B
2B
2B
2B
2B
0
1
2
3
4
5
6
7
MNA509
25
13
14
16
17
19
20
22
23
2A
0
36
2A
1
35
2A
2
33
2A
3
32
2A
4
30
2A
5
29
2A
6
27
2A
7
26
Fig.5 Logic symbol.
1999 Nov 156
Page 7
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
74AVC16245
(3.6 V tolerant)
RECOMMENDED OPERATING CONDITIONS
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
CC
DC supply voltageaccording JEDEC low-voltage
standards
low-voltage applications1.23.6V
V
I
V
O
DC input voltage03.6V
DC output voltage3-state03.6V
HIGH or LOW state0V
T
amb
t
, t
r
f
operating ambient temperaturein free air−40+85°C
input rise and fall timesVCC= 1.65 to 2.3 V030ns/V
= 2.3 to 3.0 V020ns/V
V
CC
V
= 3.0 to 3.6 V010ns/V
CC
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground= 0 V).
1.651.95V
2.32.7V
3.03.6V
CC
V
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
CC
I
IK
V
I
I
OK
V
O
DC supply voltage−0.5+4.6V
DC input diode currentVI<0V−−50mA
DC input voltagefor inputs; note 1−0.5+4.6V
DC output diode currentVO>VCCor VO<0V−±50mA
DC output voltageHIGH or LOW state; note 1−0.5VCC+ 0.5V
3-state; note 1−0.5+4.6V
I
O
I
CC,IGND
T
stg
P
tot
DC output source or sink currentVO=0VtoV
CC
−±50mA
DC VCC or GND current−±100mA
storage temperature−65+150°C
power dissipation per packagetemperature range from
−500mW
−40 to +85 °C; note 2
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 60°C the value of PDderates linearly with 5.5 mW/K.
1999 Nov 157
Page 8
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
DC CHARACTERISTICS
Over recommended operating conditions; voltages are referenced to GND (ground=0V).
SYMBOLPARAMETER
V
IH
HIGH-level input
voltage
V
IL
LOW-level input
voltage
V
OH
HIGH-level output
voltage
V
OL
LOW-level output
voltage
I
I
input leakage
current per pin
I
off
power off leakage
current
I
IHZ/IILZ
input current for
common I/O pins
I
OZ
3-state output
OFF-state current
I
CC
quiescent supply
current
TEST CONDITIONST
OTHERVCC(V)MIN.TYP.
1.2V
CC
1.65 to 1.950.65V
2.3 to 2.71.71.2−V
3.0 to 3.62.01.5−V
1.2−−GNDV
1.65 to 1.95−0.90.35V
2.3 to 2.7−1.20.7V
3.0 to 3.6−1.50.8V
VI=VIHor V
IL
IO= −100 µA1.65 to 3.6VCC− 0.20V
I
= −4 mA1.65VCC− 0.45VCC− 0.10−V
O
= −8 mA2.3VCC− 0.55VCC− 0.28−V
I
O
I
= −12 mA3.0VCC− 0.70VCC− 0.32−V
O
VI=VIHor V
IL
IO= 100 µA1.65 to 3.6−GND0.20V
I
= 4 mA1.65−0.100.45V
O
=8mA2.3−0.260.55V
I
O
I
=12mA3.0−0.360.70V
O
VI=VCCor GND1.65 to 3.6−0.12.5µA
VIor VO= 3.60−0.1±10µA
VI=VCCor GND1.65 to 3.6−0.112.5µA
VI=VIHor V
VO=VCCor GND
VI=VCCor GND;
IO=0
;
IL
1.65 to 2.7−0.15µA
3.0 to 3.6−0.110µA
1.65 to 2.7−0.120µA
3.0 to 3.6−0.240µA
= −40 to +85 °C
amb
CC
−−V
0.9−V
CC
74AVC16245
(1)
MAX.
CC
−V
V
UNIT
Note
1. All typical values are measured at T
amb
=25°C.
1999 Nov 158
Page 9
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
AC CHARACTERISTICS
GND = 0 V; tr=tf≤2.0 ns; CL=30pF.
SYMBOLPARAMETER
t
PHL/tPLH
propagation delay
nAnto nBn;nBnto nA
t
PZH/tPZL
3-state output enable time
nOE to nAn; nOE to nB
t
PHZ/tPLZ
3-state output disable time
nOE to nAn; nOE to nB
see Figs 6 and 81.2−2.8−ns
n
see Figs 7 and 81.2−5.9−ns
n
see Figs 7 and 81.2−6.9−ns
n
TEST CONDITIONST
WAVEFORMSV
74AVC16245
= −40 to +85 °C
amb
(V)MIN.TYP.
CC
(1)
MAX.
1.40 to 1.60 −1.8−ns
1.65 to 1.95 0.71.83.0ns
2.3 to 2.70.61.31.9ns
3.0 to 3.60.51.11.7ns
1.40 to 1.60 −3.9−ns
1.65 to 1.95 1.43.36.5ns
2.3 to 2.71.02.44.5ns
3.0 to 3.60.72.03.7ns
1.40 to 1.60 −4.8−ns
1.65 to 1.95 2.23.76.0ns
2.3 to 2.71.12.04.2ns
3.0 to 3.61.22.23.7ns
UNIT
Note
1. All typical values are measured at T
=25°C and at VCC= 1.2 V, 1.5 V, 1.8 V, 2.5 V or 3.3 V.
amb
AC WAVEFORMS
handbook, halfpage
nAn, nB
input
nBn, nA
output
V
CC
≤2.3 to 2.7 V0.5V
3.0 to 3.6 V0.5V
VOL and VOH are typical output voltage drop that occur with the output load.
V
M
CCVCC
CCVCC
V
V
I
n
GND
V
OH
n
V
OL
I
V
M
t
PHL
V
M
t
PLH
MNA511
Fig.6 The input (nAn, nBn) to output (nBn, nAn) propagation delay.
1999 Nov 159
Page 10
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
handbook, full pagewidth
V
CC
≤2.3 to 2.7 V0.5V
3.0 to 3.6 V0.5V
nOE input
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
V
M
CCVOL
CCVOL
V
I
V
M
GND
t
PLZ
V
CC
V
V
OL
V
OH
GND
V
t
PHZ
outputs
enabled
X
X
V
V
Y
+ 0.15 V VOH− 0.15 V V
+ 0.3 VVOH− 0.3 VV
74AVC16245
t
PZL
V
M
t
PZH
Y
V
M
disabled
V
CC
CC
outputs
I
outputs
enabled
MNA478
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 The 3-state enable and disable times.
handbook, full pagewidth
V
I
R
T
V
I
CC
CC
CC
TESTS1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
open
2xV
GND
CC
PULSE
GENERATOR
V
CC
<2.3 VV
2.3 to 2.7 V V
3.0 to 3.6 V V
V
CC
D.U.T.
R
load
1000 Ω
500 Ω
500 Ω
S1
2 × V
CC
open
R
V
O
C
L
Definitions for test circuit.
CL= load capacitance including jig and probe capacitance
(See Chapter “AC characteristics”).
= termination resistance should be equal to the output
R
T
impedance Z
load
R
load
of the pulse generator.
o
GND
MNA505
Fig.8 Load circuitry for switching times.
Fig.8 Test circuitry for switching times.
1999 Nov 1510
Page 11
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
PACKAGE OUTLINE
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
D
c
y
Z
4825
H
74AVC16245
SOT362-1
E
E
A
X
v M
A
A
2
A
1
pin 1 index
L
p
L
0.50
0.35
detail X
0.08
124
w M
b
e
DIMENSIONS (mm are the original dimensions).
UNITA
mm
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
A
max.
1.2
0.15
0.05
1
A2A
1.05
0.85
0.25
b
p
cD
0.2
0.2
0.1
0.1
3
0.28
0.17
p
0
(1)E(2)
12.6
12.4
2.5
scale
eHELLpQZywvθ
6.2
0.510.25
6.0
8.3
7.9
5 mm
0.8
0.4
Q
(A )
3
A
θ
0.1
0.8
0.4
o
8
o
0
OUTLINE
VERSION
SOT362-1
IEC JEDEC EIAJ
REFERENCES
MO-153ED
1999 Nov 1511
EUROPEAN
PROJECTION
ISSUE DATE
93-02-03
95-02-10
Page 12
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
SOLDERING
Introduction to soldering surface mount packages
Thistext gives a very briefinsightto a complex technology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages.Wave soldering isnot always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit boardbyscreen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating,soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
74AVC16245
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• Forpackageswith leads on foursides,thefootprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement andbefore soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 Nov 1512
Page 13
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
74AVC16245
(3.6 V tolerant)
Suitability of surface mount IC packages for wave and reflow soldering methods
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
5. Wave soldering is only suitable for SSOP and TSSOP packageswith a pitch (e) equal to or larger than 0.65 mm; it is
, SO, SOJsuitablesuitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Nov 1513
Page 14
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
NOTES
74AVC16245
1999 Nov 1514
Page 15
Philips SemiconductorsProduct specification
16-bit transceiver with direction pin; 3-state
(3.6 V tolerant)
NOTES
74AVC16245
1999 Nov 1515
Page 16
Philips Semiconductors – a w orldwide compan y
Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
1999
Internet: http://www.semiconductors.philips.com
68
Printed in The Netherlands245004/02/pp16 Date of release: 1999 Nov 15Document order number: 9397 750 06481
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