Datasheet 74AHCT1G79, 74AHC1G79 Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

74AHC1G79; 74AHCT1G79

Single D-type flip-flop;
positive-edge trigger

Product specification
File under Integrated Circuits, IC06

1999 May 18

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

FEATURES

• Symmetrical output impedance

• High noise immunity

• ESD protection:

HBM EIA/JESD22-A114-A
exceeds 2000 V;
MM EIA/JESD22-A115-A
exceeds 200 V

• Low power dissipation

• Balanced propagation delays

• Very small 5 pin package

• Output capability: standard.

DESCRIPTION

The 74AHC1G/AHCT1G79 is a
high-speed Si-gate CMOS device.

The 74AHC1G/AHCT1G79 provides
a single positive-edge triggered
D-type flip-flop.

Information on the data input is
transferred to the Q output on the
LOW-to-HIGH transition of the clock
pulse. The D input must be stable one
set-up time prior to the LOW-to-HIGH
clock transition for predictable
operation.

FUNCTION TABLE

See note 1.

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf≤3.0 ns.

amb

SYMBOL PARAMETER CONDITIONS

t

PHL/tPLH

propagation delay
CP to Q

C

I

C

PD

input capacitance 1.5 1.5 pF
power dissipation

capacitance

Notes

1. C

is used to determine the dynamic power dissipation (PDin µW).

PD

PD=CPD× V

2

× fi+(CL×V

CC

fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC= supply voltage in V.

2. The condition is VI= GND to VCC.

PINNING

PIN SYMBOL DESCRIPTION

1 D data input
2 CP clock pulse input
3 GND ground (0 V)
4 Q data output
5V

CL=15pF;
VCC=5V

notes 1 and 2;
CL=50pF;
f = 1 Mhz

2

CC

CC

74AHC1G79;

74AHCT1G79

TYPICAL

UNIT

AHC1G AHCT1G

3.5 3.5 ns

15 16 pF

× fo) where:

DC supply voltage

INPUTS OUTPUT

CP D Q+1

↑ LL
↑HH

LX Q

Note

1. H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH CP transition;
X = don’t care;
Q + 1 = state after the next

LOW-to-HIGH CP transition.

1999 May 18 2

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

74AHC1G79;

74AHCT1G79

ORDERING AND PACKAGE INFORMATION

PACKAGES

TYPE NUMBER

74AHC1G79GW
74AHCT1G79GW 5 SC-88A plastic SOT353 CP

page

CP

GND

D

1
2

79

3

MNA439

TEMPERATURE

RANGE

−40 to +85 °C

V

5

CC

Q

4

page

PINS PACKAGE MATERIAL CODE MARKING

5 SC-88A plastic SOT353 AP

1CPD4Q

2

MNA440

page

14
2

MNA441

Fig.1 Pin configuration.

handbook, full pagewidth

CP

Fig.2 Logic symbol.

C
C

C

D

TG

C

C

TG

C

TG

C

C

C

TG

C

Fig.3 IEC logic symbol.

Q

MNA442

Fig.4 Logic diagram.

1999 May 18 3

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

74AHC1G79;

74AHCT1G79

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS

V

CC

V

I

V

O

T

amb

DC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V
input voltage 0 − 5.5 0 − 5.5 V
output voltage 0 − V
operating ambient

temperature range

see DC and AC
characteristics per
device

, tf (∆t/∆f) input rise and fall times

t

r

except for
Schmitt-trigger inputs

VCC= 3.3 V ±0.3 V −−100 −−− ns/V
V

=5V±0.5 V −−20 −−20

CC

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

V

I

I

IK

I

OK

I

O

I

CC

T

stg

P

D

DC supply voltage −0.5 +7.0 V
input voltage range −0.5 +7.0 V
DC input diode current VI< −0.5 −−20 mA
DC output diode current VO< −0.5 or VO>VCC+ 0.5 V; note 1 −±20 mA
DC output source or sink current −0.5V<VO<VCC+ 0.5 V −±25 mA
DC VCC or GND current −±75 mA
storage temperature −65 +150 °C
power dissipation per package temperature range: −40 to +85 °C;

note 2

74AHC1G 74AHCT1G

MIN. TYP. MAX. MIN. TYP. MAX.

0 − V

CC

CC

V

−40 +25 +85 −40 +25 +85 °C

− 200 mW

UNIT

Notes

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.

1999 May 18 4

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

DC CHARACTERISTICS
Family 74AHC1G

Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).

SYMBOL PARAMETER

V

IH

HIGH-level input
voltage

V

IL

V

OH

LOW-level input voltage 2.0 −− 0.5 − 0.5 V

HIGH-level output
voltage; all outputs

HIGH-level output
voltage

V

OL

LOW-level output
voltage; all outputs

LOW-level output
voltage

I

I

I

CC

input leakage current VI=VCCor GND 5.5 −− 0.1 − 1.0 µA
quiescent supply

current

C

I

input capacitance − 1.5 10 − 10 pF

TEST CONDITIONS T

OTHER VCC (V)

MIN. TYP. MAX. MIN. MAX.

2.0 1.5 −−1.5 − V

3.0 2.1 −−2.1 −

5.5 3.85 −−3.85 −

3.0 −− 0.9 − 0.9

5.5 −− 1.65 − 1.65

VI=VIHor VIL;
IO= −50 µA

2.0 1.9 2.0 − 1.9 − V

3.0 2.9 3.0 − 2.9 −

4.5 4.4 4.5 − 4.4 −

V

I=VIH

or VIL;

3.0 2.58 −−2.48 − V

IO= −4.0 mA
V

I=VIH

or VIL;

4.5 3.94 −−3.8 −

IO= −8.0 mA
VI=VIHor VIL;

IO=50µA

2.0 − 0 0.1 − 0.1 V

3.0 − 0 0.1 − 0.1

4.5 − 0 0.1 − 0.1

V

I=VIH

or VIL;

3.0 −− 0.36 − 0.44 V

IO=4mA
V

I=VIH

or VIL;

4.5 −− 0.36 − 0.44

IO=8mA

VI=VCCor GND;

5.5 −− 1.0 − 10 µA

IO=0

amb

25 −40 to +85

74AHC1G79;

74AHCT1G79

(°C)

UNIT

1999 May 18 5

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

Family 74AHCT1G

Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).

TEST CONDITIONS T

SYMBOL PARAMETER

V

IH

V

IL

V

OH

HIGH-level input voltage 4.5 to 5.5 2.0 −− 2.0 − V
LOW-level input voltage 4.5 to 5.5 −−0.8 − 0.8 V
HIGH-level output

voltage; all outputs
HIGH-level output

voltage

V

OL

LOW-level output
voltage; all outputs

LOW-level output voltage V

I
I

∆I

I
CC

CC

input leakage current VI=VIHor V
quiescent supply current VI=VCCor GND;

additional quiescent
supply current per input
pin

C

I

input capacitance − 1.5 10 − 10 pF

OTHER VCC (V)

VI=VIHor VIL;
IO= −50 µA

V

I=VIH

or VIL;

IO= −8.0 mA
VI=VIHor VIL;

IO=50µA

or VIL;

I=VIH

IO=8mA

IL

IO=0
VI= 3.4 V

other inputs at
VCCor GND; IO=0

MIN. TYP. MAX. MIN. MAX.

4.5 4.4 4.5 − 4.4 − V

4.5 3.94 −− 3.8 − V

4.5 − 0 0.1 − 0.1 V

4.5 −−0.36 − 0.44 V

5.5 −−0.1 − 1.0 µA

5.5 −−1.0 − 10 µA

5.5 −−1.35 − 1.5 mA

25 −40 to +85

74AHC1G79;

74AHCT1G79

(°C)

amb

UNIT

1999 May 18 6

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

AC CHARACTERISTICS
Type 74AHC1G79

GND = 0 V; t

SYMBOL PARAMETER

t

PHL/tPLH

t

su

t

h

t

W

f

max

≤3.0 ns.

r=tf

TEST CONDITIONS T

propagation delay
CP to Q

WAVEFORMS C

see Figs 5 and 6 15 pF 3.0 to 3.6 − 4.9

L

50 pF 3.0 to 3.6 − 6.9
15 pF 4.5 to 5.5 − 3.5

50 pF 4.5 to 5.5 − 5.1
set-up time D to CP 4.5 to 5.5 3.0 1.0 − 3.0 − ns
hold time D to CP 4.5 to 5.5 +2.0 −1.0 − 0 − ns
clock pulse width

HIGH or LOW
maximum clock

pulse frequency

74AHC1G79;

74AHCT1G79

(°C)

amb

VCC (V)

25 −40 to +85

MIN. TYP. MAX. MIN. MAX.

(1)

8.4 1.0 9.8 ns

(1)

12.0 1.0 14.0 ns

(2)

5.6 1.0 7.0 ns

(2)

8.0 1.0 10.0 ns

4.5 to 5.5 3.0 −− 3.0 − ns

4.5 to 5.5 90 −− 90 − MHz

UNIT

Notes

1. Typical values at V

CC

= 3.3 V.

2. Typical values at VCC= 5.0 V.

Type 74AHCT1G79

GND = 0 V; tr=tf≤3.0 ns.

SYMBOL PARAMETER

t

PHL/tPLH

propagation delay
CP to Q

t

su

t

h

t

W

set-up time D to CP 4.5to5.5 3.0 1.0 − 3.0 − ns
hold time D to CP 4.5to5.5 +2.0 −1.0 − 0 − ns
clock pulse width

HIGH or LOW

f

max

maximum clock
pulse frequency

Note

1. Typical values at V

CC

= 5.0 V.

TEST CONDITIONS T

WAVEFORMS C

L

VCC (V)

MIN. TYP. MAX. MIN. MAX.

see Figs 5 and 6 15 pF 4.5 to 5.5 − 3.5

50 pF 4.5 to 5.5 − 5.0

4.5 to 5.5 3.0 −−3.0 − ns

4.5 to 5.5 90 −−90 − MHz

(°C)

amb

25 −40 to +85

(1)

5.0 1.0 6.0 ns

(1)

8.0 1.0 10.0 ns

UNIT

1999 May 18 7

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

AC WAVEFORMS

handbook, full pagewidth

D INPUT

CP INPUT

Q OUTPUT

FAMILY

AHC1G GND to V

VI INPUT

REQUIREMENTS

CC

AHCT1G GND to 3.0 V 1.5 V 50% V

V

I

GND

V

I

V

M

GND

V

OH

V

OL

V

M

INPUT

V

OUTPUT

50% VCC50% V

t

PHL

V

M

M

CC
CC

74AHC1G79;

74AHCT1G79

V

M

t

PLH

V

M

MNA443

Fig.5 The clock pulse (CP) to output (Q) propagation delays.

handbook, halfpage

V

PULSE

GENERATOR

Definitions for test circuit:
CL= load capacitance including jig and probe capacitance (see Chapter“AC characteristics”).
RT= termination resistance should be equal to the output impedance Z0 of the pulse generator.

I

V

CC

V

D.U.T.

R

T

O

C

L

MNA101

Fig.6 Load circuitry for switching times.

1999 May 18 8

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

74AHC1G79;

74AHCT1G79

PACKAGE OUTLINE

Plastic surface mounted package; 5 leads SOT353

D

y

E

H

E

AB

45

X

v M

A

132

e

1

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm

A

1.1

0.8

max

0.1

1

b

p

0.30

0.25

0.20

0.10

b

p

e

cD

2.2

1.8

A

wBM

0 1 2 mm

scale

E

1.35

1.15

(2)

1.3

e

0.65

H

E

1

2.2

0.45

2.0

0.15

e

A

1

detail X

L

Qywv

p

0.25

0.15

0.2 0.10.2

Q

L

p

c

OUTLINE
VERSION

SOT353

IEC JEDEC EIAJ

REFERENCES

1999 May 18 9

EUROPEAN

PROJECTION

ISSUE DATE

97-02-28SC-88A

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

SOLDERING
Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in

“Data Handbook IC26; Integrated Circuit Packages”

our
(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

74AHC1G79;

74AHCT1G79

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

1999 May 18 10

Philips Semiconductors Product specification

Single D-type flip-flop; positive-edge trigger

74AHC1G79;

74AHCT1G79

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

BGA, SQFP not suitable suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable

(3)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

, SO, SOJ suitable suitable

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

The package footprint must incorporate solder thieves downstream and at the side corners.

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

WAVE REFLOW

(2)

(3)(4)
(5)

SOLDERING METHOD

(1)

suitable

suitable
suitable

.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1999 May 18 11

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1999 64

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 245002/00/01/pp12 Date of release: 1999 May 18 Document order number: 9397 750 05983